US2018190683A1PendingUtilityA1

Thin film transistor and method for manufacturing the same, and display device including the same

Assignee: LG DISPLAY CO LTDPriority: Dec 30, 2016Filed: Dec 27, 2017Published: Jul 5, 2018
Est. expiryDec 30, 2036(~10.4 yrs left)· nominal 20-yr term from priority
Inventors:Hyungjoon Koo
H10P 14/69397H10P 14/69394H10P 14/69391H10P 14/6939H10P 14/6314H01L 21/02175H01L 21/02194H01L 27/127H01L 21/02178H01L 27/1251H01L 29/78696H01L 29/7869H01L 21/02186H01L 21/02244H01L 29/24H01L 27/1225H01L 29/78606H10D 30/6713H10D 30/6704H10D 64/691H10D 86/40H10D 30/6755H10D 99/00H10D 86/425H10D 86/423H10D 86/0221H10D 62/80H10D 30/6757H10D 30/6739H10D 86/471H10D 86/60H10P 95/90H10P 14/6938
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Claims

Abstract

A thin film transistor and a method for manufacturing the same, and a display device including the same are disclosed, in which a P type semiconductor characteristic is realized using an active layer that includes a Sn based oxide. The thin film transistor comprises an active layer that includes an Sn(II)O based oxide; a metal oxide layer being in contact with one surface of the active layer; a gate electrode overlapped with the active layer; a gate insulating film provided between the gate electrode and the active layer; a source electrode being in contact with a first side of the active layer; and a drain electrode being in contact with a second side of the active layer.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A thin film transistor comprising:
 an active layer that includes a Sn(II)O based oxide;   a metal oxide layer in contact with the active layer;   a gate electrode vertically overlapping the active layer;   a gate insulating layer between the gate electrode and the active layer;   a source electrode in contact with a first portion of the active layer; and   a drain electrode in contact with a second portion of the active layer.   
     
     
         2 . The thin film transistor of  claim 1 , wherein the metal oxide layer is an electrically insulating layer. 
     
     
         3 . The thin film transistor of  claim 2 , wherein the metal oxide layer is formed of an aluminum oxide, a titanium oxide, a thallium oxide, or a molybdenum-titanium oxide. 
     
     
         4 . The thin film transistor of  claim 1 , wherein the metal oxide layer is disposed on an upper surface of the active layer. 
     
     
         5 . The thin film transistor of  claim 4 , wherein the source electrode and the drain electrode are in contact with the metal oxide layer. 
     
     
         6 . The thin film transistor of  claim 5 , wherein the active layer is disposed over the gate electrode. 
     
     
         7 . The thin film transistor of  claim 4 , wherein the metal oxide layer is disposed on a portion of the upper surface of the active layer. 
     
     
         8 . The thin film transistor of  claim 7 , wherein the portion of the upper surface of the active layer not covered with the metal oxide layer is a conductive area. 
     
     
         9 . The thin film transistor of  claim 8 , wherein the source electrode and the drain electrode are in contact with the conductive area of the active layer. 
     
     
         10 . The thin film transistor of  claim 8 , wherein the gate electrode is disposed on the active layer. 
     
     
         11 . The thin film transistor of  claim 1 , wherein the metal oxide layer is disposed below the active layer. 
     
     
         12 . A display device comprising:
 a first thin film transistor having a P type semiconductor characteristic; and   a second thin film transistor having an N type semiconductor characteristic,   wherein the first thin film transistor includes a first active layer having an Sn(II)O based oxide, and the second thin film transistor includes a second active layer having an Sn(IV)O 2  based oxide.   
     
     
         13 . The display device of  claim 12 , wherein the first thin film transistor includes:
 a metal oxide layer in contact with the first active layer;   a first gate electrode vertically overlapping the first active layer;   a gate insulating film between the first gate electrode and the first active layer;   a first source electrode in contact with a first portion of the first active layer; and   a first drain electrode in contact with a second portion of the first active layer.   
     
     
         14 . The display device of  claim 12 , wherein the second thin film transistor includes:
 a second gate electrode vertically overlapping the second active layer;   a gate insulating film between the second gate electrode and the second active layer;   a second source electrode in contact with a first portion of the second active layer; and   a second drain electrode in contact with a second portion of the second active layer.   
     
     
         15 . The display device of  claim 13 , wherein the metal oxide layer is an electrically insulating layer. 
     
     
         16 . The display device of  claim 13 , wherein the metal oxide layer is disposed on an upper surface of the second active layer. 
     
     
         17 . The display device of  claim 13 , wherein the metal oxide layer is disposed on a lower surface of the second active layer. 
     
     
         18 . A display device including a first thin film transistor, comprising:
 a first active layer including an Sn(II)O based oxide;   a metal oxide layer disposed on at least one of first and second surfaces of the first active layer and converted from an reactive metal layer;   a first gate electrode vertically overlapping the first active layer;   a gate insulating layer electrically insulating the gate electrode from the first active layer;   a first source electrode contacting a first portion of the first active layer; and   a first drain electrode contacting a second portion of the first active layer.   
     
     
         19 . The thin film transistor of  claim 18 , wherein the reactive metal layer is converted to the metal oxide layer through a reduction reaction in the first active layer and an oxidation reaction in the reactive metal layer. 
     
     
         20 . The thin film transistor of  claim 18 , further comprising an interlayer dielectric layer covering the metal oxide layer, the source electrode, the drain electrode including the gate insulating layer. 
     
     
         21 . The thin film transistor of  claim 20 , wherein the source electrode contacts the first portion of the first active layer through a first contact hole in the interlayer dielectric layer and the first drain electrode contacts the second portion of the first active layer through a second contact hole in the interlayer dielectric layer. 
     
     
         22 . The thin film transistor of  claim 21 , wherein the first and second portions are first and second conductive areas of the first active layer, respectively. 
     
     
         23 . The thin film transistor of  claim 18 , further comprising a second thin film transistor including a second active layer having an Sn(IV)O 2  based oxide and a second drain electrode contacting the second active layer. 
     
     
         24 . The thin film transistor of  claim 23 , wherein the first drain elect doe of the first thin film transistor is connected with the second drain electrode of the second thin film transistor. 
     
     
         25 . The thin film transistor of  claim 24 , wherein the first and second thin film transistors function as a complementary metal oxide semiconductor (CMOS) circuit. 
     
     
         26 . The thin film transistor of  claim 18 , wherein the Sn(II)O based oxide is formed of SnO 2 , Sn-M-O x , Sn-M1-M2-O x  or M-doped SnO2, where M, M1 and M2 are W, B, Nb, Al, Ga, Pb or Si. 
     
     
         27 . The thin film transistor of  claim 18 , wherein the reactive metal layer is formed of aluminum, titanium, thallium, molybdenum or a titanium alloy. 
     
     
         28 . The thin film transistor of  claim 23 , wherein the Sn(IV)O 2  based oxide is formed of SnO 2 , Sn-M-O x , Sn-M1-M2-O x  or M-doped SnO2, where M, M1 and M2 are W, B, Nb, Al, Ga, Pb or Si. 
     
     
         29 . The thin film transistor of  claim 18 , wherein first source electrode and the first drain electrode are formed of a metal material or an alloy having a work function greater than 5.0 eV.

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