Storage device and method for controlling storage device

Abstract

The storage device of the present invention provides a decompression VOL having no corresponding relationship (mapping) with a final storage media to a superior device, and receives accesses from the superior device to the decompression VOL. Then, data written into the decompression VOL is compressed on-line in a cache memory, and the compressed data is mapped to a compression VOL which is a volume mapped to a final storage media. At the same time, by maintaining and managing a mapping information between an area in the decompression VOL where data has been written and a location in the compression VOL to which compressed data of the relevant data is mapped, when a read request is received from a superior device regarding the decompression VOL, the storage device converts a location information in the decompression VOL designated by the read request to a location information of the final storage media.

1 . A storage device comprising a processor, a cache memory, and a memory device, and which is connected to an external device:
 the storage device comprising a compression controller configured to control input and output to and from the cache memory;   wherein   the processor creates a first virtual volume that is recognized by the external device, and a second virtual volume corresponding to the memory device;   the compression controller creates a first logical storage space corresponding to the first virtual volume, and a second logical storage space corresponding to the second virtual volume; and   in case the first virtual volume receives a write request of a write data before compression from the external device,   the processor maps the write data before compression, an address of a first logical storage space corresponding to the first virtual volume related to the write data, and an address of the second logical storage space, to the compression controller, and   the compression controller compresses the write data before compression received and stores a compressed write data to the cache memory, and maps the stored compressed write data with an address of the first logical storage space and an address of the second logical storage space.   
     
     
         2 . The storage device according to  claim 1 ,
 wherein the compression controller is capable of reading a compressed write data stored in the cache memory while selecting a compressed state and a decompressed state of the same.   
     
     
         3 . The storage device according to  claim 2 ,
 wherein the compression controller   decompresses a compressed data stored in the cache memory and sends the same to the processor, when receiving a read request with an address of the first logical storage space, and   sends a compressed data stored in the cache memory in a compressed state to the processor, when receiving a read request with an address of the second logical storage space.   
     
     
         4 . The storage device according to  claim 2 ,
 wherein the processor reads a compressed write data stored in the cache memory and stores the same in the memory device.   
     
     
         5 . The storage device according to  claim 1 ,
 wherein the compression controller creates a parity based on the compressed write data, and stores the same with the compressed write data to the cache memory.   
     
     
         6 . The storage device according to  claim 1 ,
 wherein, in case the first virtual volume receives a write request of a write data before compression from the external device,   the processor   transmits the write data before compression and an address of a first logical storage space corresponding to the first virtual volume related to the write data, to the cache device, and transmits a notice of completion of a process related to the write request to the external device, and   in case a compressed write data stored in the cache memory becomes equal to or greater than a given amount, determines an address of the second logical storage space corresponding to an address of the first logical storage space and transmits the same to the cache device, reads a compressed write data stored in the cache memory, and stores the compressed write data to the memory device.   
     
     
         7 . An information processor comprising a processor and a cache memory, and which is connected to a first device and a second device:
 the information processor comprising a controller configured to control an input and output to and from the cache memory:   the compression controller creates a first logical storage space corresponding to the first device, and a second logical storage space corresponding to the second device; and   in case the first logical storage space receives a write data before compression from the external device,   the processor maps the write data before compression, an address of a first logical storage space corresponding to the first virtual volume related to the write data, and an address of the second logical storage space, to the compression controller, and   the compression controller compresses the write data before compression received and stores a compressed write data to the cache memory, and maps the stored compressed write data with an address of the first logical storage space and an address of the second logical storage space.   
     
     
         8 . A processing method in a storage device comprising a processor, a cache memory, and memory device, and which is connected to an external device:
 the storage device comprising a compression controller configured to control input and output to and from the cache memory;   wherein   the processor creates a first virtual volume that is recognized by the external device, and a second virtual volume corresponding to the memory device;   the compression controller creates a first logical storage space corresponding to the first virtual volume, and a second logical storage space corresponding to the second virtual volume; and   in case the first virtual volume receives a write request of a write data before compression from the external device,   the processor maps the write data before compression, an address of a first logical storage space corresponding to the first virtual volume related to the write data, and an address of the second logical storage space, to the compression controller, and   the compression controller compresses the write data before compression received and stores a compressed write data to the cache memory, and maps the stored compressed write data with an address of the first logical storage space and an address of the second logical storage space.   
     
     
         9 . A processing method in an information processor comprising a processor and a cache memory, and which is connected to a first device and a second device:
 the information processor comprising a controller configured to control an input and output to and from the cache memory:   the compression controller creates a first logical storage space corresponding to a first device, and a second logical storage space corresponding to the second device; and   in case the first logical storage space receives a write data before compression from the first device,   the processor maps the write data before compression, an address of a first logical storage space corresponding to the first virtual volume related to the write data, and an address of the second logical storage space, to the compression controller, and   the compression controller compresses the write data before compression received and stores a compressed write data to the cache memory, and maps the stored compressed write data with an address of the first virtual logical space and an address of the second virtual logical space.