US2018152198A1PendingUtilityA1

Analogue-to-digital converter

Assignee: CIRRUS LOGIC INT SEMICONDUCTOR LTDPriority: Nov 4, 2014Filed: Jan 24, 2018Published: May 31, 2018
Est. expiryNov 4, 2034(~8.3 yrs left)· nominal 20-yr term from priority
H03M 3/484H03M 2201/00H03M 1/50H03M 1/181H03M 1/18H03M 7/30H03K 7/08H03K 9/08H03M 1/504H03M 1/60H03M 1/0854H03M 1/56
50
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Claims

Abstract

This application relates to analogue-to-digital converters (ADCs). An ADC 200 has a first converter ( 201 ) for receiving an analogue input signal (AIN) and outputting a time encode signal (DT), such as a pulse-width-modulated (PWM) signal, based on input signal and a first conversion gain setting (GIN). In some embodiments the first converter has a PWM modulator ( 401 ) for generating a PWM signal such that the input signal is encoded by pulse widths that can vary continuously in time. A second converter ( 202 ) receives the time encoded signal and outputs a digital output signal (DOUT) based on the time encoded signal (DT) and a second conversion gain setting (GO). The second converter may have a first PWM-to-digital modulator ( 403 ). A gain allocation block ( 204 ) generates the first and second conversion gain settings based on the time encoded signal (DT). The gain allocation block ( 204 ) may have a second PWM-to-digital modulator ( 203 ) which may be of lower latency and/or lower resolution that the first PWM-to-digital modulator ( 403 ).

Claims

exact text as granted — not AI-modified
1 - 19 . (canceled) 
     
     
         20 . An analogue to digital converter for converting an analogue input signal into a corresponding digital output signal comprising:
 a first time encoding converter for receiving said analogue input signal and outputting a time encoded signal based on said analogue input signal and a first conversion gain setting, wherein the time encoded signal encodes the input signal by the timing of signal transitions that can vary continuously in time,   a first time decoding converter for receiving said time encoded signal and outputting said output digital signal based on said time encoded signal and a second conversion gain setting; and   a gain allocation block for generating the said first and second conversion gain settings based on the time encoded signal.   
     
     
         21 .- 22 . (canceled)

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