Data transmission device

Abstract

According to one embodiment, a buffer circuit sets a level of transmission data to high or low, a power supply line supplies a power supply voltage to the buffer circuit, a buffer control circuit controls a switching operation of the buffer circuit, a current circuit feeds a dummy current to the power supply line, and a current control circuit controls the dummy current based on the level set in the transmission data.

What is claimed is: 
     
         1 . A data transmission device comprising:
 a buffer circuit that sets a level of transmission data to high or low;   a power supply line that supplies a power supply voltage to the buffer circuit;   a buffer control circuit that controls a switching operation of the buffer circuit;   a current circuit that makes a dummy current flow to the power supply line; and   a current control circuit that controls the dummy current based on the level set in the transmission data or a transmission timing of the transmission data.   
     
     
         2 . The data transmission device of  claim 1 , further comprising:
 a slew rate control circuit that controls a slew rate of the dummy current.   
     
     
         3 . The data transmission device of  claim 2 , wherein the slew rate control circuit turns on one or more transistors with a slew rate control signal. 
     
     
         4 . The data transmission device of  claim 3 , wherein the slew rate control signals further controls a magnitude of the dummy current. 
     
     
         5 . The data transmission device of  claim 3 , wherein the one or more transistors are N-channel transistors. 
     
     
         6 . The data transmission device of  claim 1 , wherein the current control circuit turns off the dummy current when the level of the transmission data is high, and turns on the dummy current when the level of the transmission data is low. 
     
     
         7 . The data transmission device of  claim 1 , further comprising:
 a clock driver that transmits a clock signal,   wherein before the transmission data is transmitted together with the clock signal, the current control circuit turns on the dummy current, and while the transmission data is transmitted together with the clock signal, the current circuit turns off the dummy current.   
     
     
         8 . The data transmission device of  claim 7 , wherein when two or more low levels of the transmission data continue while the transmission data is transmitted together with the clock signal, the current control circuit turns on the dummy current during the last low level. 
     
     
         9 . The data transmission device of  claim 1 , wherein the current circuit is connected in parallel to the buffer circuit. 
     
     
         10 . The data transmission device of  claim 1 , wherein a buffer current flows through the buffer circuit when the level of the transmission data is high. 
     
     
         11 . The data transmission device of  claim 1 , wherein a capacitor is connected in parallel to the buffer circuit. 
     
     
         12 . The data transmission device of  claim 1 , wherein the dummy current reduces variation in the power supply voltage. 
     
     
         13 . A data transmission device comprising:
 a clock driver that transmits a clock signal;   a buffer circuit that sets a level of transmission data to high or low;   a buffer control circuit that controls a switching operation of the buffer circuit; and   a pre-control circuit that switches the buffer circuit two or more times before the transmission data is transmitted together with the clock signal.   
     
     
         14 . The data transmission device of  claim 13 , wherein the buffer control circuit controls the switching operation of the buffer circuit based on the level of the transmission data. 
     
     
         15 . The data transmission device of  claim 13 , wherein when the level of the transmission data is low, a buffer current does not flow through the buffer circuit. 
     
     
         16 . The data transmission device of  claim 13 , wherein when the level of the transmission data is high, a buffer current flows through the buffer circuit. 
     
     
         17 . The data transmission device of  claim 13 , wherein a buffer current flows before the transmission data is transmitted. 
     
     
         18 . The data transmission device of  claim 17 , wherein the buffer current reduces a variation in a power supply voltage caused by the switching operation of the buffer circuit. 
     
     
         19 . The data transmission device of  claim 13 , wherein the clock signal is not transmitted before the transmission data is transmitted. 
     
     
         20 . The data transmission device of  claim 13 , wherein the pre-control circuit switches the buffer circuit by controlling one or more output buffers of the buffer circuit.