US2018138123A1PendingUtilityA1

Interconnect structure and method of forming the same

Assignee: GLOBALFOUNDRIES INCPriority: Nov 15, 2016Filed: Nov 15, 2016Published: May 17, 2018
Est. expiryNov 15, 2036(~10.3 yrs left)· nominal 20-yr term from priority
H10W 20/4437H10P 14/43H10W 20/048H10W 20/48H10W 20/42H10W 20/036H10W 20/4403H10W 20/425H10W 20/081H10W 20/066H10W 20/057H10W 20/056H10W 20/054H10W 20/47H10W 20/047H10W 20/40H10W 20/037H10W 20/035H10W 20/033H10W 20/435H01L 23/5283H01L 23/53266H01L 21/76855H01L 21/76889H01L 23/53295H01L 21/76846H01L 21/76879H10D 64/667
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Claims

Abstract

Aspects of the present disclosure include a semiconductor device which includes a dielectric layer deposited over a conductive region and an interconnect electrically connecting the conductive region with a top surface of the dielectric layer. The interconnect includes a barrier layer extending from an interior of the dielectric layer to the conductive region and covering the conductive region. The barrier layer encases a cobalt plug. The interconnect includes a tungsten cap on an upper surface of the cobalt plug. The tungsten cap is coplanar with an upper surface of the dielectric layer. A method of manufacturing the semiconductor device is also provided.

Claims

exact text as granted — not AI-modified
1 - 12 . (canceled) 
     
     
         13 . A semiconductor device comprising:
 a dielectric layer deposited over a conductive region;   an interconnect electrically connecting the conductive region to a plane defined by a top surface of the dielectric layer, the interconnect comprising:
 a barrier layer covering the conductive region, the barrier layer encasing a cobalt plug, a tungsten cap on an upper surface of the cobalt plug, the tungsten cap coplanar with the top surface of the dielectric layer, wherein the tungsten cap comprises a first layer positioned on the cobalt plug and adjacent to sidewalls of the dielectric layer, and a second layer positioned within the first layer, wherein an upper surface of the first layer is coplanar with an upper surface of the second layer and the top surface of the dielectric layer. 
   
     
     
         14 . (canceled) 
     
     
         15 . The semiconductor device according to  claim 13 , further comprising a fluorine free tungsten interlayer between the barrier layer and the cobalt plug. 
     
     
         16 . The semiconductor device according to  claim 13 , wherein the barrier layer comprises titanium nitride. 
     
     
         17 . The semiconductor device according to  claim 13 , wherein the barrier layer comprises a dual layer of titanium deposited on titanium nitride. 
     
     
         18 . The semiconductor device according to  claim 13 , wherein the barrier layer comprises titanium. 
     
     
         19 . The semiconductor device according to  claim 13 , wherein the conductive region comprises silicide. 
     
     
         20 . The semiconductor device according to  claim 13 , further comprising a titanium liner between the conductive region and the barrier layer.

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