Electronic device, in particular for protection against overvoltages

Abstract

An electronic device is formed by a sequence of at least two thyristors coupled in series in a same conduction direction. Each thyristor has a gate of a first conductivity type. The gates of the first conductivity type for the thyristors in the sequence are coupled together in order to form a single control gate.

1 . An integrated circuit, comprising:
 a semiconductor body having a first conductivity type; and   a first thyristor formed in said semiconductor body, comprising:   a first semiconductor region in the semiconductor body having a second conductivity type opposite to the first conductivity type, the first semiconductor region forming an anode of the first thyristor;   a second semiconductor region in the semiconductor body having the second conductivity type, the first and second semiconductor regions separated from each other by a portion of the semiconductor body, the second semiconductor region forming a cathode of the first thyristor; and   wherein the semiconductor body forms a cathode control gate of the first thyristor.   
     
     
         2 . The integrated circuit of  claim 1 , further comprising a first heavily doped region of the first conductivity type formed in said portion of the semiconductor body and configured to provide a contact for said cathode control gate. 
     
     
         3 . The integrated circuit of  claim 2 , wherein said first heavily doped region of the first conductivity type surrounds the first and second semiconductor regions and passes between the first and second semiconductor regions. 
     
     
         4 . The integrated circuit of  claim 2 , further comprising:
 a second heavily doped region of the second conductivity type formed within the first semiconductor region; and   a third heavily doped region of the first conductivity type formed within the second semiconductor region.   
     
     
         5 . The integrated circuit of  claim 4 , further comprising a fourth heavily doped region of the second conductivity type formed within the second semiconductor region and in contact with the third heavily doped region. 
     
     
         6 . The integrated circuit of  claim 5 , wherein the fourth heavily doped region is shorted to the third heavily doped region. 
     
     
         7 . The integrated circuit of  claim 1 , further comprising a second thyristor formed in said semiconductor body, comprising:
 a third semiconductor region in the semiconductor body having the second conductivity type, the third semiconductor region forming an anode of the second thyristor;   a fourth semiconductor region in the semiconductor body having the second conductivity type, the third and fourth semiconductor regions separated from each other by the portion of the semiconductor body, the fourth semiconductor region forming a cathode of the second thyristor; and   wherein the semiconductor body forms a cathode control gate of both the first and second thyristors.   
     
     
         8 . The integrated circuit of  claim 7 , further comprising an electrical connection configured to connect the cathode of the first thyristor to the anode of the second thyristor. 
     
     
         9 . The integrated circuit of  claim 7 , further comprising:
 a first heavily doped region of the first conductivity type formed in said portion of the semiconductor body separating the first and second semiconductor regions and configured to provide a contact for said cathode control gate of the first thyristor; and   a second heavily doped region of the first conductivity type formed in said portion of the semiconductor body separating the third and fourth semiconductor regions and configured to provide a contact for said cathode control gate of the second thyristor.   
     
     
         10 . The integrated circuit of  claim 9 , further comprising:
 a third heavily doped region of the first conductivity type formed in a portion of the semiconductor body separating the first and second thiyristors and configured to provide a contact for said cathode control gate of the first and second thyristors.   
     
     
         11 . An integrated circuit, comprising:
 a semiconductor body having a first conductivity type;   a first semiconductor region in the semiconductor body having a second conductivity type opposite to the first conductivity type;   a second semiconductor region in the semiconductor body having the second conductivity type;   wherein the first semiconductor region is separated from the second semiconductor regions by a first portion of the semiconductor body; and   a first heavily doped region of the first conductivity type formed as a ring surrounding the first and second semiconductor regions and further extending through said first portion of the semiconductor body between the first and second semiconductor regions.   
     
     
         12 . The integrated circuit of  claim 11 , further comprising:
 a second heavily doped region of the second conductivity type formed within the first semiconductor region; and   a third heavily doped region of the first conductivity type formed within the second semiconductor region.   
     
     
         13 . The integrated circuit of  claim 12 , further comprising a fourth heavily doped region of the second conductivity type formed within the second semiconductor region and in contact with the third heavily doped region. 
     
     
         14 . The integrated circuit of  claim 13 , wherein the fourth heavily doped region is shorted to the third heavily doped region. 
     
     
         15 . The integrated circuit of  claim 12 , wherein the second heavily doped region is an anode terminal of a thyristor, the third heavily doped region is a cathode terminal of the thyristor and the first heavily doped region is a control gate of the thyristor.