Spacer defined fin growth and differential fin width

Abstract

Methods for forming fins with a straight profile by preventing fin bending during STI fill and annealing are disclosed. Embodiments include providing STI regions separated by Si regions, each topped with a hardmask; planarizing the STI regions; removing the hardmask over a portion of the Si regions, forming recesses; forming a conformal spacer layer over the STI regions and in the recesses; removing horizontal portions of the spacer layer; epitaxially growing Si in each recess, forming fins; and etching the STI regions and a remainder of the spacer layer down to the Si regions to reveal the fins.

What is claimed is: 
     
         1 . A device comprising:
 a silicon (Si) substrate;   shallow trench isolation (STI) regions formed in the Si substrate; and   a first set of epitaxially grown Si fins with uniform width between the STI regions on a first portion of the Si substrate and a second set of epitaxially grown Si fins with uniform width between the STI regions on a second portion of the Si substrate.   
     
     
         2 . The device according to  claim 1 , wherein the width of each of the first set of epitaxially grown Si fins is less than a distance between adjacent STI regions. 
     
     
         3 . The device according to  claim 1 , wherein the width of each of the first set of epitaxially grown Si fins is less than a width of each of the second set of epitaxially grown Si fins. 
     
     
         4 . The device according to  claim 2 , wherein the distance between the adjacent STI regions is 5 nanometer (nm) to 25 nm. 
     
     
         5 . The device according to  claim 1 , wherein the width of each of the first set of epitaxially grown Si fins is 2 nm to 17 nm. 
     
     
         6 . The device according to  claim 1 , wherein the width of each of the second set of epitaxially grown Si fins is 8 nm to 25 nm. 
     
     
         7 . The device according to  claim 1 , wherein the width of each of the second set of epitaxially grown Si fins is equal to a distance between adjacent STI regions on the second portion of the Si substrate. 
     
     
         8 . The device according to  claim 1 , wherein the first set of epitaxially grown Si fins form NFET and PFET regions. 
     
     
         9 . The device according to  claim 1 , wherein the first set of epitaxially grown Si fins form portions of core (SG) devices. 
     
     
         10 . The device according to  claim 1 , wherein the second set of epitaxially grown Si fins form portions of input/output (EG) devices. 
     
     
         11 . A device comprising:
 a silicon (Si) substrate;   shallow trench isolation (STI) regions formed in the Si substrate; and   epitaxially grown Si fins with uniform width formed on the Si substrate, between the STI regions, wherein the width of each fin is less than a distance between adjacent STI regions.   
     
     
         12 . The device according to  claim 11 , wherein the width of each of the epitaxially grown Si fins is 2 nanometer (nm) to 17 nm. 
     
     
         13 . The device according to  claim 11 , wherein the distance between the adjacent STI regions is 5 nm to 25 nm. 
     
     
         14 . The device according to  claim 11 , wherein the epitaxially grown Si fins form NFET and PFET regions. 
     
     
         15 . A device comprising:
 a silicon (Si) substrate;   shallow trench isolation (STI) regions formed in the Si substrate; and   a first set of epitaxially grown Si fins on a first portion of the Si substrate and a second set of epitaxially grown Si fins on a second portion of the Si substrate,   wherein width of each of the first set of epitaxially grown Si fins is less than width of each of the second set of epitaxially grown Si fins.   
     
     
         16 . The device according to  claim 15 , wherein each of the first set of epitaxially grown Si fins has a width of 5 nm to 12 nm. 
     
     
         17 . The device according to  claim 15 , wherein each of the second set of epitaxially grown Si fins has a width of 8 nm to 25 nm. 
     
     
         18 . The device according to  claim 15 , wherein each of the second set of epitaxially grown Si fins has a width equal to a distance between adjacent STI regions. 
     
     
         19 . The device according to  claim 15 , wherein the first set of epitaxially grown Si fins form portions of core (SG) devices and the second set of epitaxially grown Si fins form portions of input/output (EG) devices.