US2018129558A1PendingUtilityA1
Optimizing reclaimed flash memory
Est. expiryDec 31, 2034(~8.4 yrs left)· nominal 20-yr term from priority
Inventors:Srikanta Das
G06F 11/1048G11C 11/005
39
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
A memory system or flash card may optimize usage of reclaimed memory. The optimization may include lists for Uncorrectable Error Correction Code (UECC) and Correctable Error Correction Code (CECC) that can be used along with a dual programming scheme. Dual programming may be utilized for blocks on the lists, but not for blocks that are not on the lists. The lists can be updated by reading data programmed to blocks on the lists.
Claims
exact text as granted — not AI-modifiedWe claim:
1 . A storage device comprising:
an error correction code (ECC) engine configured to identify when blocks of memory are subject to an error; an ECC list circuitry that maintains a list of blocks of memory that are subject to an error; and a dual write circuitry configured to write a primary and backup copy in response to a write request when the block to be written is present on the list, wherein the writing to the primary and the backup copy are before writing to the block to be written from the write request.
2 . The storage device of claim 1 wherein the backup copy is not written in response to a write request when the block to be written is not present on the list.
3 . The storage device of claim 2 wherein the writing to the primary and the backup copy comprises a dual programming for writing to a primary update block and writing to a secondary update block.
4 . The storage device of claim 3 wherein data is committed from the primary update block and erased from the secondary update block when there is not an ECC with the primary update block.
5 . The storage device of claim 4 wherein data is committed from the secondary update block when there is an ECC with the primary update block.
6 . The storage device of claim 1 wherein the error comprises an uncorrectable ECC (UECC) and the list comprises a list of blocks with the UECC.
7 . The storage device of claim 1 wherein blocks with a correctable ECC (CECC) are not included in the ECC list.
8 . The storage device of claim 1 wherein the write request is received from a host.
9 . The storage device of claim 1 wherein the list comprises a list of blocks with an uncorrectable ECC (UECC) and a correctable ECC (CECC).
10 . The storage device of claim 1 further comprising:
a memory including the blocks of memory, wherein the ECC engine accesses the memory and the dual write circuitry writes to the memory.
11 . The storage device of claim 10 wherein the memory comprises reclaimed memory that is initialized by listing each memory block on the ECC list.
12 . The storage device of claim 10 wherein the memory comprises a three-dimensional (3D) memory configuration, and wherein a controller is associated with operation of the memory blocks.
13 . A storage device comprising:
means for identifying when blocks of memory are subject to an error through error correction code (ECC); means for maintaining a list of blocks of memory that are subject to an error; and means for dual programming of a particular block when the particular block is listed on the list of blocks, wherein the dual programming includes writing to a primary update block and a secondary update block before writing to the particular block.
14 . The storage device of claim 13 further comprising:
means for receiving a write request for writing to the particular block.
15 . The storage device of claim 14 further comprising:
means for committing the data to the particular block after the dual programming when the particular block is listed on the list of blocks; and
means for committing the data to the particular block without the dual programming when the particular block is not listed on the list of blocks.
16 . A method for optimizing programming of reclaimed memory, the method comprising:
initializing the reclaimed memory to include each block from the reclaimed memory on an error correction code (ECC) list; checking, upon receipt of a read request, for an ECC of a block that is read and removing the block from the ECC list when there is no ECC; writing, upon receipt of a write request, both a primary and a backup copy for the write request when a block that is to be written to is present on the ECC list, wherein the primary comprises the block that is to be written to; and writing, upon receipt of a write request, a single write for the write request when a block that is to be written to is not present on the ECC list.
17 . The method of claim 16 wherein the ECC list comprises a list of blocks with an uncorrectable ECC (UECC), further wherein blocks with a correctable ECC (CECC) are not on the ECC list.
18 . The method of claim 16 wherein the read request and the write request is received from a host.
19 . The method of claim 16 wherein the checking further comprises:
adding, when there is an ECC, the block that is to be read to the ECC list.
20 . The method of claim 16 wherein the writing to the primary and the backup copy comprises a dual programming for writing to a primary update block and writing to a secondary update block, wherein the method further comprises:
committing data from the primary update block and erasing the secondary update block when there is not an ECC with the primary update block; and
committing data from the secondary update block when there is an ECC with the primary update block.Join the waitlist — get patent alerts
Track US2018129558A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.