Iii-nitride semiconductor structures comprising spatially patterned implanted species

Abstract

III-nitride materials are generally described herein, including material structures comprising III-nitride material regions and silicon-containing substrates. Certain embodiments are related to gallium nitride materials and material structures comprising gallium nitride material regions and silicon-containing substrates.

What is claimed is: 
     
         1 . A semiconductor structure, comprising:
 a substrate comprising silicon;   a III-nitride material region located over a surface region of the substrate; and   an implanted species arranged within the surface region of the substrate in a pattern spatially defined across at least one lateral dimension of the substrate, wherein the implanted species is present within at least a portion of the surface region of the substrate at a concentration of at least about 10 19 /cm 3 .   
     
     
         2 . The semiconductor structure of  claim 1 , wherein the semiconductor structure comprises a transistor located over the substrate. 
     
     
         3 . The semiconductor structure of  claim 2 , wherein at least a portion of the substrate underneath a channel between a source of the transistor and a drain of the transistor is substantially free of the implanted species. 
     
     
         4 . The semiconductor structure of  claim 1 , wherein the semiconductor structure comprises a second transistor laterally spaced apart from the first transistor, wherein a portion of the surface region of the substrate between the first transistor and the second transistor has a concentration of the implanted species of at least about 10 19 /cm 3 . 
     
     
         5 . The semiconductor structure of  claim 1 , wherein the III-nitride material region comprises a 2 DEG region, and the 2 DEG region is substantially free of the implanted species. 
     
     
         6 . The semiconductor structure of  claim 1 , wherein the substrate comprises at least a layer having a resistivity of greater than about 10 2  Ohms-cm. 
     
     
         7 . The semiconductor structure of  claim 1 , wherein the substrate is a silicon substrate. 
     
     
         8 . The semiconductor structure of  claim 7 , wherein the substrate is a bulk silicon wafer. 
     
     
         9 . The semiconductor structure of  claim 1 , wherein the substrate is a silicon carbide substrate. 
     
     
         10 . The semiconductor structure of  claim 1 , wherein the III-nitride material region comprises GaN. 
     
     
         11 . The semiconductor structure of  claim 1 , wherein the III-nitride material region comprises a III-nitride nucleation layer. 
     
     
         12 . The semiconductor structure of  claim 1 , wherein the III-nitride material region comprises a III-nitride transition layer. 
     
     
         13 . The semiconductor structure of  claim 12 , wherein the III-nitride transition layer is compositionally graded. 
     
     
         14 . The semiconductor structure of  claim 1 , wherein the III-nitride material region comprises a III-nitride buffer layer. 
     
     
         15 . The semiconductor structure of  claim 1 , wherein the III-nitride material region comprises a III-nitride device region. 
     
     
         16 . The semiconductor structure of  claim 1 , wherein a diffusion barrier region is located between the III-nitride material region and the substrate.