US2018119288A1PendingUtilityA1

Template and method of manufacturing semiconductor device

Assignee: TOSHIBA MEMORY CORPPriority: Feb 24, 2015Filed: Dec 21, 2017Published: May 3, 2018
Est. expiryFeb 24, 2035(~8.6 yrs left)· nominal 20-yr term from priority
C23F 1/16G03F 7/0002
59
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Claims

Abstract

According to one embodiment, a template forming method is provided. In the template forming method, a template pattern is formed on a first surface of a substrate. A high liquid repellent property portion is formed in a region different from the template pattern on a side of the first surface of the substrate. The high liquid repellent property portion has a higher contacting angle with respect to a resist than a portion without the high liquid repellent property portion formed therein.

Claims

exact text as granted — not AI-modified
1 - 20 . (canceled) 
     
     
         21 . A template comprising:
 a pedestal region provided on a first surface of a first substrate, the pedestal region being a region to which a template pattern is to be formed; and   a liquid repellent portion formed on a side wall of the pedestal region, the liquid repellent portion having a concave-convex surface.   
     
     
         22 . The template according to  claim 21 , wherein the liquid repellent portion has a higher contacting angle with respect to a resist to which the template pattern is to be transferred than a portion without the liquid repellent portion. 
     
     
         23 . The template according to  claim 21 , wherein the liquid repellent portion is formed on a region on an outer side of the pedestal region. 
     
     
         24 . The template according to  claim 21 , wherein a height of a convex portion of the liquid repellent portion is lower than a height of the template pattern. 
     
     
         25 . The template according to  claim 21 , wherein a convex portion of the liquid repellent portion is a same member as an end portion of the first substrate. 
     
     
         26 . The template according to  claim 21 , wherein an upper surface area of a convex portion of the liquid repellent portion is smaller than a bottom surface area of a concave portion of the liquid repellent portion. 
     
     
         27 . The template according to  claim 26 , wherein the liquid repellent portion repels a resist by lotus effect. 
     
     
         28 . The template according to  claim 21 , wherein a convex portion of the liquid repellent portion consists of a single material. 
     
     
         29 . The template according to  claim 21 , wherein an area of a convex portion of the liquid repellent portion becomes smaller as a distance from the first substrate increases. 
     
     
         30 . The template according to  claim 21 , wherein a space between convex portions of the liquid repellent portion is smaller than pattern dimensions of the template pattern. 
     
     
         31 . A template comprising:
 a template pattern arranged on a first surface of a first substrate; and   a liquid repellent portion formed in a region different from a region to which the template pattern is arranged, the liquid repellent portion having a higher contacting angle with respect to a resist than a portion without the liquid repellent portion formed therein.   
     
     
         32 . A method of manufacturing a semiconductor device comprising:
 forming a processing film on a semiconductor substrate;   providing a resist on the processing film;   pressing a first surface of a template against the resist, the template having a pedestal region and a liquid repellent portion, the pedestal region being provided on a first surface of a first substrate, the liquid repellent portion being formed on a side wall of the pedestal region, the pedestal region being a region to which a template pattern is to be formed, the liquid repellent portion having a concave-convex surface;   filling the template pattern with the resist;   curing the resist;   separating the template from the resist; and   etching the processing film by using a resist pattern as a mask.   
     
     
         33 . The method of manufacturing the semiconductor device according to  claim 32 , wherein the liquid repellent portion has a higher contacting angle with respect to a resist to which the template pattern is to be transferred than a portion without the liquid repellent portion. 
     
     
         34 . The method of manufacturing the semiconductor device according to  claim 32 , wherein the liquid repellent portion is formed on a region on an outer side of the pedestal region. 
     
     
         35 . The method of manufacturing the semiconductor device according to  claim 32 , wherein a height of a convex portion of the liquid repellent portion is lower than a height of the template pattern. 
     
     
         36 . The method of manufacturing the semiconductor device according to  claim 32 , wherein a convex portion of the liquid repellent portion is a same member as an end portion of the first substrate. 
     
     
         37 . The method of manufacturing the semiconductor device according to  claim 32 , wherein an upper surface area of a convex portion of the liquid repellent portion is smaller than a bottom surface area of a concave portion of the liquid repellent portion. 
     
     
         38 . The method of manufacturing the semiconductor device according to  claim 37 , wherein the liquid repellent portion repels a resist by lotus effect. 
     
     
         39 . The method of manufacturing the semiconductor device according to  claim 32 , wherein a convex portion of the liquid repellent portion consists of a single material. 
     
     
         40 . The method of manufacturing the semiconductor device according to  claim 32 , wherein an area of a convex portion of the liquid repellent portion becomes smaller as a distance from the first substrate increases.

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