US2018102747A1PendingUtilityA1

Digital hybrid mode power amplifier system

Assignee: DALI SYSTEMS CO LTDPriority: May 1, 2002Filed: Aug 23, 2017Published: Apr 12, 2018
Est. expiryMay 1, 2022(expired)· nominal 20-yr term from priority
H03F 2200/451H03F 3/19H03F 3/24H03F 1/3247H03F 2201/3233H03F 2201/3224H03F 2201/3227H03F 1/3258H03F 3/20H03F 2200/129
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Claims

Abstract

A RF-digital hybrid mode power amplifier system for achieving high efficiency and high linearity in wideband communication systems is disclosed. The present invention is based on the method of adaptive digital predistortion to linearize a power amplifier in the RF domain. The power amplifier characteristics such as variation of linearity and asymmetric distortion of the amplifier output signal are monitored by the narrowband feedback path and controlled by the adaptation algorithm in a digital module. Therefore, the present invention could compensate the nonlinearities as well as memory effects of the power amplifier systems and also improve performances, in terms of power added efficiency, adjacent channel leakage ratio and peak-to-average power ratio. The present disclosure enables a power amplifier system to be field reconfigurable and support multi-modulation schemes (modulation agnostic), multi-carriers and multi-channels. As a result, the digital hybrid mode power amplifier system is particularly suitable for wireless transmission systems, such as base-stations, repeaters, and indoor signal coverage systems, where baseband I-Q signal information is not readily available.

Claims

exact text as granted — not AI-modified
1 . (canceled) 
     
     
         2 . A method of adaptive digital predistortion, the method comprising:
 receiving a digital signal at a reconfigurable digital module including a crest factor reduction (CFR) block and a digital predistorter;   processing, by the CFR block, the digital signal to provide a peak reduced signal;   processing, by the digital predistorter, the peak reduced signal to provide a predistorted signal;   transmitting the predistorted signal to a power amplifier portion;   outputting, by the power amplifier portion, one or more RF output signals;   receiving, at a feedback portion, a part of the one or more RF output signals;   converting, by the feedback portion, the part of the one or more RF output signals to a digital feedback signal;   receiving, by the reconfigurable digital module, the digital feedback signal; and   reconfiguring the reconfigurable digital module.   
     
     
         3 . The method of  claim 2  wherein processing, by the digital predistorter, includes utilizing a predistortion polynomial. 
     
     
         4 . The method of  claim 3  wherein reconfiguring the reconfigurable digital module further comprises updating the predistortion polynomial using the digital feedback signal. 
     
     
         5 . The method of  claim 4  wherein updating the predistortion polynomial further comprises:
 searching locations of a main channel signal; 
 determining an adjacent channel power level or an adjacent channel power ratio using the main channel signal; and 
 determining, using a multi-directional search algorithm, one or more coefficients associated with the predistortion polynomial using the adjacent channel power level or the adjacent channel power ratio. 
 
     
     
         6 . The method of  claim 2  wherein reconfiguring the reconfigurable digital module further comprises reconfiguring at least one of a digital field programmable gate array, digital-to-analog converters, analog-to-digital converters, and a phase-locked loop. 
     
     
         7 . The method of  claim 2  wherein the power amplifier portion is responsive to the predistorted signal. 
     
     
         8 . The method of  claim 2  wherein the one or more RF output signals corresponds to the predistorted signal. 
     
     
         9 . The method of  claim 2  wherein converting the part of the one or more RF output signals to the digital feedback signal further comprises:
 sampling, by a directional coupler, the part of the one or more RF output signals; 
 converting the part of the one or more RF output signals to an intermediate frequency (IF) analog signal; and 
 converting the IF analog signal to the digital feedback signal. 
 
     
     
         10 . The method of  claim 2  wherein the digital signal includes a plurality of digital data streams. 
     
     
         11 . The method of  claim 10  further comprising up-converting, by the reconfigurable digital module, the plurality of digital data streams to an intermediate frequency. 
     
     
         12 . The method of  claim 2  wherein the reconfigurable digital module further includes an analog to digital converter. 
     
     
         13 . The method of  claim 12  further comprising:
 receiving an analog signal at the reconfigurable digital module; and 
 converting the analog signal to the digital signal. 
 
     
     
         14 . A method of adaptive digital predistortion, the method comprising:
 receiving a digital signal at a reconfigurable digital module including a digital predistorter;   processing, by the digital predistorter, the digital signal to provide a predistorted signal;   transmitting the predistorted signal to a power amplifier portion;   outputting, by the power amplifier portion, one or more RF output signals;   receiving, at a feedback portion, a part of the one or more RF output signals;   converting, by the feedback portion, the part of the one or more RF output signals to a digital feedback signal;   receiving, by the reconfigurable digital module, the digital feedback signal; and   reconfiguring the reconfigurable digital module.   
     
     
         15 . The method of  claim 14  further comprising processing, by a crest factor reduction (CFR) block configured to reduce peak to average power ratio in the reconfigurable digital module, the digital signal. 
     
     
         16 . The method of  claim 14  further comprising
 determining, by the reconfigurable digital module, a gate bias voltage of the power amplifier portion; and 
 transmitting the gate bias voltage to the power amplifier portion. 
 
     
     
         17 . The method of  claim 16  wherein determining the gate bias voltage further comprises monitoring a temperature associated with the power amplifier portion. 
     
     
         18 . The method of  claim 14  further comprising:
 sweeping a local oscillation signal associated with the part of the one or more RF output signals; 
 finding one or more main channels of the power amplifier portion; and 
 detecting, for each of the one or more main channels, an adjacent channel power level or an adjacent channel power ratio. 
 
     
     
         19 . The method of  claim 14  further comprising:
 determining a clipping error; 
 providing a clipping error restoration path coupling the reconfigurable digital module to an output of the power amplifier portion; and 
 transmitting a clipping error restoration signal from the reconfigurable digital module to the output of the power amplifier portion. 
 
     
     
         20 . The method of  claim 14  wherein processing, by the digital predistorter, includes utilizing a predistortion polynomial. 
     
     
         21 . The method of  claim 20  wherein reconfiguring the reconfigurable digital module further comprises updating the predistortion polynomial using the digital feedback signal.

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