Semiconductor device

Abstract

A semiconductor device includes a substrate, a body structure and an electronic component. The body structure is disposed above the substrate and includes a semiconductor die, a molding compound, a conductive component and a lower redistribution layer (RDL). The semiconductor die has an active surface. The molding compound encapsulates the semiconductor die and has a lower surface, an upper surface opposite to the lower surface and a through hole extending to the upper surface from the lower surface. The conductive component is formed within the through hole. The lower RDL is formed on the lower surface of the molding compound, the active surface of the semiconductor die and the conductive component exposed from the lower surface. The electronic component is disposed above the upper surface of the molding compound and electrically connected to the lower RDL through the conductive component.

What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a substrate;   a body structure disposed above the substrate and comprising:
 a semiconductor die having an active surface; 
 a molding compound encapsulating the semiconductor die and having a lower surface, an upper surface opposite to the lower surface and a through hole extending to the upper surface from the lower surface; 
 a conductive component formed within the through hole; 
 a lower redistribution layer (RDL) formed on the lower surface of the molding compound, the active surface of the semiconductor die and the conductive component exposed from the lower surface; 
   an electronic component disposed above the upper surface of the molding compound and electrically connected to the lower RDL through the conductive component.   
     
     
         2 . The semiconductor device as claimed in  claim 1 , wherein the body structure further comprises:
 an upper RDL formed on the upper surface and the molding compound and electrically connected to the conductive component;   wherein the electronic component partly overlaps the semiconductor die in a stack direction of the electronic component and the semiconductor die.   
     
     
         3 . The semiconductor device as claimed in  claim 2 , wherein the upper RDL comprises:
 an upper passivation layer having an upper surface; and   a conductive pad formed projecting from the upper surface of the upper passivation layer;   wherein the electronic component has a conductive contact, and the electronic component is disposed on the conductive pad by the conductive contact.   
     
     
         4 . The semiconductor device as claimed in  claim 1 , wherein the electronic component partly does overlap the semiconductor die in a stack direction of the electronic component and the semiconductor die. 
     
     
         5 . The semiconductor device as claimed in  claim 1 , wherein the electronic component is a High Bandwidth Memory (HBM). 
     
     
         6 . The semiconductor device as claimed in  claim 1 , wherein the semiconductor die is a System on Chip (SOC). 
     
     
         7 . The semiconductor device as claimed in  claim 1 , wherein the semiconductor die is formed by a silicon wafer. 
     
     
         8 . The semiconductor device as claimed in  claim 1 , wherein the lower RDL extends beyond a lateral surface of the semiconductor die to form a fan-out structure. 
     
     
         9 . A semiconductor device, comprising:
 a molding substrate comprises:
 a first molding compound having an upper surface, a lower surface and a first through hole extending to the lower surface from the upper surface; 
 a first upper RDL formed on the upper surface of the first molding compound; 
 a lower RDL formed on the lower surface of the first molding compound; 
 a first conductive component formed within the first through hole and connecting the lower RDL to the first upper RDL; and 
   an electronic component disposed on the first upper RDL.   
     
     
         10 . The semiconductor device as claimed in  claim 9 , further comprises:
 a second molding compound formed on the first upper RDL and encapsulating the electronic component.   
     
     
         11 . The semiconductor device as claimed in  claim 9 , wherein the first upper RDL comprises:
 an upper passivation layer having an upper surface; and   a conductive pad projecting from the upper surface of the upper passivation layer;   wherein the electronic component has a conductive contact, and the electronic component is disposed on the conductive pad by the conductive contact.   
     
     
         12 . The semiconductor device as claimed in  claim 9 , further comprises:
 a semiconductor die embedded in the first molding compound of the molding substrate, and the semiconductor die is formed by a silicon wafer.   
     
     
         13 . The semiconductor device as claimed in  claim 12 , further comprises:
 a semiconductor die embedded in the first molding compound of the molding substrate and comprising:
 a silicon substrate having an upper surface; and 
 a second upper RDL formed on the upper surface of the silicon substrate and electrically connected to the first upper RDL. 
   
     
     
         14 . The semiconductor device as claimed in  claim 9 , wherein the electronic component is a HBM. 
     
     
         15 . The semiconductor device as claimed in  claim 12 , wherein the semiconductor die is a SOC. 
     
     
         16 . The semiconductor device as claimed in  claim 9 , wherein the silicon substrate has a lower surface opposite to the upper surface of the silicon substrate; the semiconductor die has a second through hole extending to the lower surface of the silicon substrate from the upper surface of the silicon substrate; the semiconductor die further comprises a second conductive component formed within the second through hole; the first molding compound has a blind hole extending to the second conductive component from the lower surface of the first molding compound; the molding substrate further comprises third conductive component is formed within the blind hole and electrically connects the second conductive component to the lower RDL. 
     
     
         17 . A semiconductor device, comprising:
 a lower RDL;   a body structure disposed on the lower RDL and comprising:
 a silicon interposer; 
 an electronic component disposed on the silicon interposer; and 
 a first molding compound encapsulating the electronic component and the silicon interposer; and 
   a second molding compound formed on the lower RDL and encapsulating the body structure.   
     
     
         18 . The semiconductor device as claimed in  claim 17 , wherein the lower RDL is directly connected to a lower surface of the silicon interposer, a lower surface of the first molding compound and a lower surface of the second molding compound. 
     
     
         19 . The semiconductor device as claimed in  claim 17 , wherein the lower RDL comprises:
 a conductive contact connected to the body structure.   
     
     
         20 . The semiconductor device as claimed in  claim 19 , wherein the second molding compound is formed between the body structure and the lower RDL.