US2018102296A1PendingUtilityA1

Substrate

Assignee: ADVANCED MICRO DEVICE SHANGHAI CO LTDPriority: Mar 1, 2013Filed: Dec 11, 2017Published: Apr 12, 2018
Est. expiryMar 1, 2033(~6.6 yrs left)· nominal 20-yr term from priority
H05K 2201/10674H05K 2201/0209H05K 1/036H05K 2201/0959H05K 3/0061H05K 3/0052H05K 3/3452H05K 1/024H10W 70/687H10W 90/724H10W 70/68H01L 2924/0002H01L 23/13H01L 2224/16225H01L 2924/01078
46
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

The present invention relates to a substrate comprising a build-up and a solder resist layer disposed on the build-up. The solder resist layer has an upper surface facing away from the build-up. The solder resist layer has a plurality of grooves on its upper surface. The grooves of the solder resist layer can better eliminate or relieve the stress accumulated on large solder resist area induced by heat and/or material coefficient of thermal expansion mismatch of the substrate and thus can prevent and diminish warpage of the substrate or package.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A substrate, comprising:
 a build-up layer; and   a solder resist layer disposed on the build-up and extending a width in a first direction and a length in a second direction different from the first direction, the solder resist layer comprising:
 an upper surface facing away from the build-up layer, and 
 a plurality of grooves disposed on the upper surface of the solder resist layer, 
   wherein the plurality of grooves comprise:
 a first groove set including a plurality of parallel first grooves; and 
 a second groove set including a plurality of parallel second grooves, wherein the plurality of parallel first grooves intersect with the plurality of parallel second grooves. 
   
     
     
         2 . The substrate of  claim 1 , wherein the plurality of parallel first grooves intersects at an intersecting angle with the plurality of parallel second grooves and the intersecting angle is in a range from 0° to 90°. 
     
     
         3 . The substrate of  claim 1 , wherein the plurality of parallel first grooves intersects at an intersecting angle of 90° with the plurality of parallel second grooves and the intersecting angle is 90°. 
     
     
         4 . A substrate, comprising:
 a build-up layer; and   a solder resist layer disposed on the build-up and extending a width in a first direction and a length in a second direction different from the first direction, the solder resist layer comprising:
 an upper surface facing away from the build-up layer, and 
 a plurality of grooves disposed on the upper surface of the solder resist layer, 
   wherein the grooves are defined by solder resist paths and a solder resist path disposed between two adjacent grooves is a discontinuous solder resist path.   
     
     
         5 . The substrate of  claim 4 , wherein the discontinuous solder resist path comprises a plurality of cylindrical solder resist bumps spaced from each other. 
     
     
         6 . The substrate of  claim 4 , wherein the discontinuous solder resist path comprises a plurality of prismatic solder resist bumps spaced from each other. 
     
     
         7 . The substrate of  claim 4 , wherein the discontinuous solder resist path comprises a plurality of cubic solder resist bumps spaced from each other. 
     
     
         8 . The substrate of  claim 4 , wherein the discontinuous solder resist path comprises a plurality of cylindrical, cubic and/or prismatic solder resist bumps spaced from each other.

Join the waitlist — get patent alerts

Track US2018102296A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.