Configuration control system and configuration control method
Abstract
An FPGA can be started up without system failure when a soft error occurs. A configuration control system includes: a first semiconductor chip which is capable of programming a logic circuit inside an LSI; a semiconductor memory which stores a plurality of pieces of circuit information of the first semiconductor chip; and a second semiconductor chip which, when controlling a configuration of the semiconductor chip using the circuit information stored in the semiconductor memory, if the configuration using any one of the plurality of pieces of circuit information fails, performs a re-configuration using another piece of circuit information among the plurality of pieces of circuit information.
Claims
exact text as granted — not AI-modified1 . A configuration control method for a logic device that is capable of programming a logic circuit inside a large scale integrated circuit (LSI) using first or second circuit information, the method comprising:
configuring, by a controller, the logic device using the first circuit information; confirming that the configuring of the logic device completed successfully; confirming that the first circuit information was used in the successful configuration of the logic device.
2 . The configuration control method according to claim 1 , further comprising notifying, by the controller, that the first circuit information was used to perform the successful configuration of the logic device.
3 . The configuration control method according to claim 1 , wherein the first and the second circuit information are stored in a same single memory.
4 . The configuration control method according to claim 1 , wherein the first and the second circuit information are respectively stored in two different memories.
5 . The configuration control method according to claim 1 , wherein the logic device is a field programmable gate array (FPGA).
6 . A configuration control apparatus for a logic device for programming a logic circuit inside a large scale integrated circuit (LSI) using first or second circuit information, the apparatus comprising:
a memory configured to store at least the first circuit information; a controller that performs configuring of the logic device using the first circuit information, wherein at least one of the logic device and the controller are configured to confirm that the configuring of the logic device completed successfully; wherein at least one of the logic device and the controller are configured to confirm that the first circuit information was used in the successful configuration of the logic device.
7 . The configuration control apparatus according to claim 6 , wherein the controller is configured to notify that the first circuit information was used to perform the successful configuration of the logic device.
8 . The configuration control apparatus according to claim 6 , wherein the memory stores the first circuit information and the second circuit information.
9 . The configuration control apparatus according to claim 6 , further comprising a second memory, wherein the second memory stores the second circuit information.
10 . The configuration control apparatus according to claim 6 , wherein the logic device is a field programmable gate array (FPGA).Join the waitlist — get patent alerts
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