Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Abstract

A gate insulating film and a gate electrode of non-single crystalline silicon for forming an nMOS transistor are provided on a silicon substrate. Using the gate electrode as a mask, n-type dopants having a relatively large mass number (70 or more) such as As ions or Sb ions are implanted, to form a source/drain region of the nMOS transistor, whereby the gate electrode is amorphized. Subsequently, a silicon oxide film is provided to cover the gate electrode, at a temperature which is less than the one at which recrystallization of the gate electrode occurs. Thereafter, thermal processing is performed at a temperature of about 1000° C., whereby high compressive residual stress is exerted on the gate electrode, and high tensile stress is applied to a channel region under the gate electrode. As a result, carrier mobility of the nMOS transistor is enhanced.

1 . (canceled) 
     
     
         2 . A semiconductor device, comprising a polysilicon gate electrode provided on a silicon substrate, wherein
 said gate electrode is subjected to compressive stress as internal stress therein, to apply tensile stress to said silicon substrate, and   ions having a mass number of 70 or more are implanted into said gate electrode.   
     
     
         3 . The semiconductor device according to  claim 2 , wherein
 said gate electrode is a gate electrode of an n-channel MOS transistor.   
     
     
         4 . The semiconductor device according to  claim 3 , wherein
 said ions having a mass number of 70 or more are operative to serve as those for forming a source and drain region of said n-channel MOS transistor.   
     
     
         5 . The semiconductor device according to  claim 2 , wherein
 said ions having a mass number of 70 or more are electrically inactive ions.   
     
     
         6 . The semiconductor device according to  claim 2 , wherein
 said gate electrode has a bird's beak at a lower edge portion thereof, said bird's beak being defined by a silicon oxide film.   
     
     
         7 . The semiconductor device according to  claim 2 , wherein
 said silicon substrate is a strained silicon substrate.   
     
     
         8 . A method of manufacturing a semiconductor device, comprising the steps of:
 (a) providing a non-single crystalline silicon gate electrode on a silicon substrate;   (b) implanting ions having a mass number of 70 or more into said gate electrode;   (c) depositing a predetermined film at a temperature of 550° C. or less, to cover said gate electrode including therein said ions having a mass number of 70 or more; and   (d) performing thermal processing at a temperature of more than 550° C. while covering said gate electrode with said predetermined film.   
     
     
         9 . The method according to  claim 8 , wherein
 said gate electrode is a gate electrode of an n-channel MOS transistor.   
     
     
         10 . The method according to  claim 8 , wherein
 said gate electrode provided in said step (a) includes a plurality of gate electrodes, and   only a predetermined one of said plurality of gate electrodes undergoes said step (b).   
     
     
         11 . The method according to  claim 10 , wherein
 said plurality of gate electrodes include gate electrodes of an n-channel MOS transistor and a p-channel MOS transistor, and   said predetermined one of said plurality of gate electrodes to be subjected to said step (b) is a gate electrode of said n-channel MOS transistor.   
     
     
         12 . The method according to  claim 10 , wherein
 said plurality of gate electrode include gate electrodes of a plurality of n-channel MOS transistors.   
     
     
         13 . The method according to  claim 8 , wherein
 said gate electrode provided in said step (a) includes a plurality of gate electrodes,   said method further comprising the step of:   (e) prior to said step (d), removing a part of said predetermined film on a predetermined one of said plurality of gate electrodes.   
     
     
         14 . The method according to  claim 9 , wherein
 ion implantation at said step (b) is intended to form a source and drain region of said n-channel MOS transistor.   
     
     
         15 . The method according to  claim 8 , wherein
 said ions implanted at said step (b) are electrically inactive ions.   
     
     
         16 . The method according to  claim 8 , wherein
 said predetermined film has a property that it shrinks by said thermal processing.   
     
     
         17 . The method according to  claim 8 , wherein
 said predetermined film is a silicon oxide film.   
     
     
         18 . The method according to  claim 8 , further comprising:
 (f) oxidizing surfaces of said silicon substrate and said gate electrode, to form a bird's beak defined by a silicon oxide film at a lower edge portion of said gate electrode.   
     
     
         19 . The method according to  claim 8 , wherein
 said silicon substrate is a strained silicon substrate.