Space-efficient underfilling techniques for electronic assemblies
Abstract
Space-efficient underfilling techniques for electronic assemblies are described. According to some such techniques, an underfilling method may comprise mounting an electronic element on a surface of a substrate, dispensing an underfill material upon the surface of the substrate within a dispense region for forming an underfill for the electronic element, and projecting curing rays upon at least a portion of the dispensed underfill material to inhibit an outward flow of dispensed underfill material from the dispense region, and the underfill material may comprise a non-visible light (NVL)-curable material. Other embodiments are described and claimed.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method, comprising:
mounting an electronic element on a surface of a substrate; dispensing an underfill material upon the surface of the substrate within a dispense region for forming an underfill for the electronic element, the underfill material to comprise a non-visible light (NVL)-curable material; and projecting curing rays upon at least a portion of the dispensed underfill material to inhibit an outward flow of dispensed underfill material from the dispense region.
2 . The method of claim 1 , the curing rays to comprise ultraviolet (UV) light.
3 . The method of claim 1 , the curing rays to comprise infrared (IR) light.
4 . The method of claim 1 , comprising conveying a dispense assembly along a dispense path to dispense the underfill material within the dispense region.
5 . The method of claim 4 , the dispense assembly to comprise a light source, the light source to project a curing beam upon dispensed underfill material as the dispense assembly traverses the dispense path.
6 . The method of claim 1 , comprising projecting a curing frame upon a curing region surrounding the dispense region.
7 . The method of claim 1 , the electronic element to comprise a semiconductor die.
8 . The method of claim 7 , the semiconductor die to comprise one or more integrated circuits (ICs).
9 . The method of claim 1 , the substrate to comprise a printed circuit board (PCB).
10 . The method of claim 1 , the underfill material to comprise an NVL-curable epoxy.
11 . An apparatus, comprising:
a dispenser to dispense an underfill material, the underfill material to comprise a non-visible light (NVL)-curable material selected for use to form an underfill for an electronic element mounted on a surface of a substrate; and a light source coupled to the dispenser, the light source to emit curing rays for curing underfill material dispensed by the dispenser.
12 . The apparatus of claim 11 , the curing rays to comprise ultraviolet (UV) light.
13 . The apparatus of claim 11 , the curing rays to comprise infrared (IR) light.
14 . The apparatus of claim 11 , the electronic element to comprise a semiconductor die.
15 . The apparatus of claim 14 , the semiconductor die to comprise one or more integrated circuits (ICs).
16 . The apparatus of claim 11 , the substrate to comprise a printed circuit board (PCB).
17 . The apparatus of claim 11 , the underfill material to comprise an NVL-curable epoxy.
18 . A method, comprising:
depositing a stencil material to form an underfilling stencil for an electronic element mounted on a surface of a substrate; dispensing an underfill material through one or more openings of the underfilling stencil to form an underfill for the electronic element, the underfill material to comprise a non-visible light (NVL)-curable material; and projecting curing rays to cure at least a portion of the dispensed underfill material.
19 . The method of claim 18 , the curing rays to comprise ultraviolet (UV) light.
20 . The method of claim 18 , the curing rays to comprise infrared (IR) light.
21 . The method of claim 18 , at least a portion of the curing rays to at least partially permeate the underfilling stencil.
22 . The method of claim 18 , the electronic element to comprise a semiconductor die.
23 . The method of claim 22 , the semiconductor die to comprise one or more integrated circuits (ICs).
24 . The method of claim 18 , the substrate to comprise a printed circuit board (PCB).
25 . The method of claim 18 , the underfill material to comprise an NVL-curable epoxy.Join the waitlist — get patent alerts
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