Balanced control of processor temperature

Abstract

In an embodiment, a processor includes a plurality of cores and a plurality of temperature sensors, where each core is proximate to at least one temperature sensor. The processor also includes a power control unit (PCU) including temperature logic to receive temperature data that includes a corresponding temperature value from each of the temperature sensors. Responsive to an indication that a highest temperature value of the temperature data exceeds a threshold, the temperature logic is to adjust a plurality of domain frequencies according to a determined policy that is based on instruction execution characteristics of at least two of the plurality of cores. Each domain frequency is associated with a corresponding domain that includes at least one of the plurality of cores and each domain frequency is independently adjustable. Other embodiments are described and claimed.

What is claimed is: 
     
         1 . A processor comprising:
 a plurality of cores;   a plurality of temperature sensors, wherein each core is proximate to at least one temperature sensor; and   a power control unit (PCU) including temperature logic to receive temperature data including a corresponding temperature value from each of the temperature sensors, and responsive to an indication that a highest temperature value of the temperature data exceeds a threshold, to adjust a plurality of domain frequencies according to a determined policy that is based on instruction execution characteristics of at least two of the plurality of cores, wherein each domain frequency is associated with a corresponding domain that includes at least of one of the plurality of cores and each domain frequency is independently adjustable.