Semiconductor device, test program, and test method

Abstract

When a screening test at a normal temperature is performed instead of a low temperature screening test of SRAM, overkill is reduced and risk of outflow of defects due to local variation is suppressed. An SRAM including a word line, a bit line pair, a memory cell, and a drive circuit that drives the bit line pair is provided with a function that can drive one bit line of the bit line pair at a high level (VDD) potential and drive the other bit line at an intermediate potential (VSS+several tens mV to one handled and several tens mV) a little higher than a low level (VSS) potential for normal writing when writing data into the memory cell.

1 . A semiconductor device comprising:
 a word line;   a bit line pair;   a memory cell arranged at a position where the word line and the bit line pair intersect with each other; and   a drive circuit that drives the bit line pair with a predetermined voltage to write data into the memory cell,   wherein a first potential and a second potential higher than the first potential are supplied to the memory cell as power sources,   wherein the semiconductor device has a first operation mode and a second operation mode,   wherein in the first operation mode, the drive circuit drives one bit line of the bit line pair toward the first potential and drives the other bit line toward the second potential, and   wherein in the second operation mode, the drive circuit drives one bit line of the bit line pair toward the first potential and drives the other bit line to a third potential that is higher than the first potential and lower than the second potential.   
     
     
         2 - 14 . (canceled)