Semiconductor device and method of manufacturing the same

Abstract

Deterioration in reliability is prevented regarding a semiconductor device. The deterioration is caused when an insulating film for formation of a sidewall is embedded between gate electrodes at the time of forming sidewalls having two kinds of different widths on a substrate. A sidewall-shaped silicon oxide film is formed over each sidewall of a gate electrode of a low breakdown voltage MISFET and a pattern including a control gate electrode and a memory gate electrode. Then, a silicon oxide film beside the gate electrode is removed, and a silicon oxide film is formed on a semiconductor substrate, and then etchback is performed. Accordingly, a sidewall, formed of a silicon nitride film and the silicon oxide film, is formed beside the gate electrode, and a sidewall, formed of the silicon nitride film and the silicon oxide films, is formed beside the pattern.

1 . (canceled) 
     
     
         2 . A method of manufacturing a semiconductor device comprising:
 (a) providing a semiconductor substrate;   (b) forming a gate electrode of a first FET on the semiconductor substrate in a first region, the gate electrode of the first FET including a first gate electrode on the semiconductor substrate via a first gate insulating film and a second gate electrode on the semiconductor substrate via a second gate insulating film having a charge storage portion, such that the second gate electrode is disposed along a sidewall of the first gate electrode in a plan view, the first FET acting as a nonvolatile memory cell;   (c) forming a gate electrode of a second FET on the semiconductor substrate in a second region via a third gate insulating film, the second FET acting as a logic circuit;   (d) forming a first insulating film over the semiconductor substrate to cover the gate electrodes of the first and second FETs respectively, and forming a second insulating film over the first insulating film;   (e) performing an anisotropic etching to the second insulating film, and leaving portions of the second insulating film along sidewalls of the gate electrodes of the first and second FETs, thereby to form first sidewall spacers at the gate electrode of the first FET and second sidewall spacers at the gate electrode of the second FET;   (f) removing the second sidewall spacers at the gate electrode of the second FET, and leaving the first sidewall spacers at the gate electrode of the first FET;   (g) forming a third insulating film over the semiconductor substrate to cover the gate electrodes of the first and second FETs;   (h) performing an anisotropic etching to the third insulating film, and leaving portions of the third insulating film along sidewalls of the gate electrodes of the first and second FETs, thereby to form third sidewall spacers on the first sidewall spacers at the gate electrode of the first FET and on the first insulating film at the gate electrode of the second FET; and   (i) introducing impurities into the semiconductor substrate in the first region defined by the gate electrode of the first FET with the first insulating film and the first and third sidewall spacers, thereby to form source and drain regions of the first FET, and in the second region defined by the gate electrode of the second FET with the first insulating film and the third sidewall spacer, thereby to form source and drain regions of the second FET.   
     
     
         3 . The method of manufacturing a semiconductor device according  claim 2 ,
 wherein the first insulating film comprises silicon nitride, and the second and third insulating film comprise silicon oxide.   
     
     
         4 . The method of manufacturing a semiconductor device according  claim 2 ,
 wherein the first and third insulating film comprise silicon nitride, and the second insulating film comprises silicon oxide.   
     
     
         5 . The method of manufacturing a semiconductor device according  claim 2 ,
 wherein the third gate insulating film has a higher dielectric constant than that of a silicon nitride film.   
     
     
         6 . The method of manufacturing a semiconductor device according  claim 2 ,
 wherein a sidewall spacer of the first FET comprises the first insulating film and the first and third sidewall spacers, and a sidewall spacer of the second FET comprises the first insulating film and the third sidewall spacers.   
     
     
         7 . The method of manufacturing a semiconductor device according  claim 2 ,
 wherein the first and second gate electrode are arranged in a first direction,   wherein a width of the sidewall spacer of the first FET in the first direction is larger than a width of the sidewall spacer of the second FET in the first direction.   
     
     
         8 . The method of manufacturing a semiconductor device according  claim 2 ,
 wherein the first insulating film above the gate electrode of the first FET is removed in the operation (h).   
     
     
         9 . The method of manufacturing a semiconductor device according  claim 2 ,
 wherein the third sidewall spacers are formed on the first insulating film in the second region.   
     
     
         10 . A method of manufacturing a semiconductor device comprising:
 (a) providing a semiconductor substrate;   (b) forming a gate electrode of a first FET on the semiconductor substrate in a first region, the gate electrode of the first FET including a first gate electrode on the semiconductor substrate via a first gate insulating film and a second gate electrode on the semiconductor substrate via a second gate insulating film having a charge storage portion, such that the second gate electrode is disposed along a sidewall of the first gate electrode in a plan view, the first FET acting as a nonvolatile memory cell;   (c) forming a gate electrode of a second FET on the semiconductor substrate in a second region via a third gate insulating film, the second FET acting as a logic circuit;   (d) forming a first insulating film over the semiconductor substrate to cover the gate electrodes of the first and second FETs respectively;   (e) performing an anisotropic etching to the first insulating film, and leaving portions of the first insulating film along sidewalls of the gate electrodes of the first and second FETs, thereby to form first sidewall spacers at the gate electrode of the first FET and second sidewall spacers at the gate electrode of the second FET;   (f) removing the second sidewall spacers at the gate electrode of the second FET, and leaving the first sidewall spacers at the gate electrode of the first FET;   (g) forming a second insulating film over the semiconductor substrate to cover the gate electrodes of the first and second FETs;   (h) performing an anisotropic etching to the second insulating film, and leaving portions of the second insulating film along sidewalls of the gate electrodes of the first and second FETs, thereby to form third sidewall spacers on the first sidewall spacers at the gate electrode of the first FET and along the sidewalls of the gate electrode of the second FET; and   (i) introducing impurities into the semiconductor substrate in the first region defined by the gate electrode of the first FET with the first and third sidewall spacers, thereby to form source and drain regions of the first FET, and in the second region defined by the gate electrode of the second FET with the third sidewall spacers, thereby to form source and drain regions of the second FET.   
     
     
         11 . The method of manufacturing a semiconductor device according  claim 10 ,
 wherein a sidewall spacer of the first FET comprises the first and third sidewall spacers, and a sidewall spacer of the second FET comprises the third sidewall spacers.   
     
     
         12 . The method of manufacturing a semiconductor device according  claim 10 ,
 wherein the first and second gate electrode are arranged in a first direction,   wherein a width of the sidewall spacer of the first FET in the first direction is larger than a width of the sidewall spacer of the second FET in the first direction.