Semiconductor device and manufacturing method thereof

Abstract

In a semiconductor device (SP 1 ) according to an embodiment, a solder resist film (first insulating layer, SR 1 ) which is in contact with the base material layer, and a resin body (second insulating layer, 4 ) which is in contact with the solder resist film and the semiconductor chip, are laminated in between the base material layer ( 2 CR) of a wiring substrate 2 and a semiconductor chip ( 3 ). In addition, a linear expansion coefficient of the solder resist film is equal to or larger than a linear expansion coefficient of the base material layer, and the linear expansion coefficient of the solder resist film is equal to or smaller than a linear expansion coefficient of the resin body. Also, the linear expansion coefficient of the base material layer is smaller than the linear expansion coefficient of the resin body. According to the above-described configuration, damage of the semiconductor device caused by a temperature cyclic load can be suppressed, and thereby reliability can be improved.

1 . A semiconductor device comprising:
 a wiring substrate including a base material layer, a terminal formed on a first surface of the base material layer, and an insulating layer formed on the first surface such that the insulating film covers a first portion of the terminal, and such that the insulating film exposes a second portion of the terminal;   a semiconductor chip including a front surface, a bonding pad formed on the front surface, and a projecting electrode formed on the bonding pad, and mounted over the wiring substrate such that the front surface faces the first surface of the wiring substrate via the projecting electrode;   a solder material located between the second portion of the terminal and the projecting electrode; and   a resin body located between the wiring substrate and the semiconductor chip, and sealing a connection part between the projecting electrode and the terminal,   wherein the insulating film has an opening in which the second portion of the terminal is exposed,   wherein, in plan view, the second portion of the terminal is extended in a first direction from a first edge of the insulating film toward a second edge of the insulating film, which is extended along the first edge,   wherein, in plan view, the second portion of the terminal has a third edge located between the first edge and the second edge, and spaced apart from each of the first edge and the second edge, and extended along the first edge, and   wherein the third edge of the second portion of the terminal is overlapped with the projecting electrode.   
     
     
         2 . The semiconductor device according to  claim 1 ,
 wherein the second portion of the terminal is comprised of a third portion that is exposed from the insulating layer, and a fourth portion that is exposed from the insulating layer and is located between the first portion and the third portion,   wherein, in plan view, a width of the third portion is greater than a width of the fourth portion, the width of each of the third portion and the fourth portion being a length along a second direction intersecting with the first direction,   wherein, in plan view, the third portion has the third edge, and a fourth edge that is opposite to the third edge and is extended along the first edge, and   wherein the third edge of the third portion is overlapped with the projecting electrode, but the fourth edge of the third portion and the fourth portion are not overlapped with the projecting electrode.   
     
     
         3 . The semiconductor device according to  claim 1 ,
 wherein, in plan view, the fourth portion has a flexion point at which an extending direction of the second portion of the terminal is changed.