Method of manufacturing a template wafer

Abstract

A method for manufacturing a semiconductor device includes providing a carrier wafer; and forming a semiconductor device layer on the carrier wafer. After front side processing of the semiconductor device layer, the carrier wafer is removed by cutting along a plane which is parallel to the semiconductor device layer.

1 . A method for manufacturing a semiconductor device, comprising:
 providing a carrier wafer comprising a first side and a second side opposite the first side;   forming a semiconductor device layer on the first side of the carrier wafer to form a compound wafer comprising the semiconductor device layer and the carrier wafer; and   separating the compound wafer by cutting the carrier wafer along a plane between the first side and the second side of the carrier wafer.   
     
     
         2 . The method according to  claim 1 , wherein the carrier wafer comprises a mechanical carrier and a separation layer arranged between the mechanical carrier and the semiconductor device layer, and wherein cutting the carrier wafer comprises cutting the separation layer of the carrier wafer. 
     
     
         3 . The method according to  claim 2 , wherein the mechanical carrier is selected from a monocrystalline material, a polycrystalline material, and an amorphous material, or a combination thereof and can optionally be comprised of the same material as the semiconductor device layer. 
     
     
         4 . The method according to  claim 2 , wherein the separation layer is bonded on the mechanical carrier by at least one of pre-ceramic polymer bonding such as allyl-hydrido-polycarbosilane, glue, thermic bond, and an electrically conductive adhesive. 
     
     
         5 . The method according to  claim 2 , wherein the separation layer is encapsulated by a protection layer, particularly by an oxygen-tight protection layer, such as a protection layer selected from an electrically conductive protection layer and an electrically insulating conductive layer. 
     
     
         6 . The method according to  claim 1 , wherein the carrier wafer comprises a core and a coating, the coating being at least one of an oxygen-tight coating and a hard coating, and wherein cutting the carrier wafer comprises cutting the core of the carrier wafer. 
     
     
         7 . The method according to  claim 1 , wherein the carrier wafer comprises a core, the method further comprising:
 forming an oxygen-tight protection layer to encapsulate the core; and   forming a hard coating on the oxygen-tight coating;   wherein cutting the carrier wafer comprises cutting the core of the carrier wafer.   
     
     
         8 . The method according to  claim 1 , further comprising at least one of:
 forming a doping region in the semiconductor device layer of the compound wafer prior to separating the compound wafer; and   forming a doping region in the semiconductor device layer at a side of the semiconductor device layer facing the carrier wafer.   
     
     
         9 . The method according to  claim 2 , wherein the carrier wafer comprises a core and wherein a material of the core or of the separation layer comprises graphite. 
     
     
         10 . The method according to  claim 1 , wherein a material of the semiconductor device layer is selected from the group consisting of SiC, GaAs, GaN, derivates thereof and combinations thereof. 
     
     
         11 . The method according to  claim 1 , the method further comprising:
 subjecting the compound wafer to a temperature treatment at a temperature of at least 500° C.   
     
     
         12 . The method according to  claim 1 , wherein cutting is selected from the group consisting of sawing, water jet cutting, and laser cutting. 
     
     
         13 . The method according to  claim 1 , the method further comprising:
 removing material of the carrier wafer remaining on the semiconductor device layer after cutting the carrier wafer.   
     
     
         14 . The method according to  claim 1 , the method further comprising:
 forming a metallization on the semiconductor device layer prior to separating the compound wafer.   
     
     
         15 . The method according to  claim 1 , the method further comprising:
 dicing the semiconductor device layer to form semiconductor chips.   
     
     
         16 . The method according to  claim 1 , wherein forming the semiconductor device layer comprises:
 bonding a donor wafer on the first side of the carrier wafer; and   splitting the donor wafer along a delamination region into two parts, wherein a first part of the donor wafer remains bonded on the carrier wafer and a second part of the donor wafer is removed.   
     
     
         17 . The method according to  claim 16 , further comprising:
 forming an epitaxial layer on the first part of the donor wafer.   
     
     
         18 . A method for manufacturing a semiconductor device, the method comprising:
 providing a carrier wafer comprising a first side and a second side opposite the first side;   forming a semiconductor device layer on the first side of the carrier wafer to form a compound wafer comprising the semiconductor device layer and the carrier wafer; and   separating the compound wafer by cutting the carrier wafer along a plane parallel to the first side.   
     
     
         19 . A compound semiconductor wafer comprising:
 a mechanical carrier, a separation layer on the mechanical carrier and a monocrystalline semiconductor device layer on the separation layer,   wherein:   the separation layer comprises graphite; and   a material of the monocrystalline semiconductor device layer is selected from the group consisting of SiC, GaAs, GaN, derivates thereof and combinations thereof.   
     
     
         20 . The compound semiconductor wafer according to  claim 19 , wherein a material of the mechanical carrier is selected from the group consisting of SiC, GaAs, GaN, derivates thereof and combinations thereof. 
     
     
         21 . The compound semiconductor wafer of  claim 19 , wherein a thickness of the separation layer is in the range of 100 μm to 1000 μm.