Local buffers in a liquid crystal on silicon chip

Abstract

An example embodiment includes a liquid crystal on silicon (LCOS) system. The LCOS system includes multiple pixels, a pixel voltage supply source (voltage source), an external buffer, and a local buffer. The voltage source is configured to supply an analog ramp to the pixels. The external buffer is configured to buffer the voltage source from the pixels. The local buffer is configured to buffer the external buffer from a subset of pixels of the plurality of pixels.

What is claimed is: 
     
         1 . A system comprising:
 a pixel voltage supply source for outputting an analog ramp signal;   a plurality of columns of pixels; and   a plurality of column drivers, each column driver of the plurality of column drivers coupled to a respective column of pixels of the plurality of columns of pixels, and each column driver of the plurality of column drivers including:   (i) a local buffer amplifier coupled to the respective column of pixels; and   (ii) a sample switch coupled between the pixel voltage supply source and the local buffer amplifier.   
     
     
         2 . The system of  claim 1 , further comprising an external buffer amplifier coupled between the pixel voltage supply source and the sample switches of the plurality of column drivers. 
     
     
         3 . The system of  claim 1 , wherein each column driver of the plurality of column drivers further includes a digital comparator configured to control the sample switches of the column drivers. 
     
     
         4 . The system of  claim 3 , wherein the digital comparator compares a target count signal and a ramp step signal associated with the analog ramp signal output by the pixel voltage supply. 
     
     
         5 . The system of  claim 4 , wherein the digital comparator closes the sample switch while the ramp step signal is less than the target count signal and opens the sample switch while the ramp step signal is equal to or greater than the target count signal. 
     
     
         6 . The system of  claim 5 , further comprising a driver configured to output a digital image data signal associated with the target count signals provided to the digital comparators of the plurality of column drivers. 
     
     
         7 . The system of  claim 6 , wherein each column driver further includes a flash circuit configured to supply a flash signal to the pixels of the respective column of pixels. 
     
     
         8 . The system of  claim 7 , wherein the flash circuit includes a flash amplifier. 
     
     
         9 . The system of  claim 8 , wherein each column driver further includes a primary capacitor coupled between a local input line and a ground, the local input line coupled between the sample switch and the local buffer amplifier. 
     
     
         10 . The system of  claim 9 , further comprising:
 a driver configured to output a digital ramp signal; and   a digital to analog converter configured to convert the digital ramp signal to the analog ramp signal.   
     
     
         11 . The system of  claim 10 , further comprising a driver configured to output image data for the pixels of the plurality of columns of pixels. 
     
     
         12 . The system of  claim 11 , wherein the pixels of the plurality of columns of pixels are further arranged into a plurality of rows of pixels. 
     
     
         13 . The system of  claim 12 , further comprising a row decoder configured to receive commands for timing operations to write a row of the plurality of rows of pixels. 
     
     
         14 . The system of  claim 13 , further comprising a plurality of row enable amplifiers, each row enable amplifier of the plurality of row enable amplifiers coupled between the row decoder and a respective row of the plurality of rows of pixels. 
     
     
         15 . A system comprising:
 a driver configured to output a digital ramp signal and image data;   a digital to analog converter configured to convert the digital ramp signal to an analog ramp signal;   an external buffer amplifier coupled to the digital to analog converter, the external buffer amplifier configured to buffer the analog ramp signal; and   a liquid crystal on silicon integrated circuit including:
 a plurality of columns of pixels; and 
 a plurality of column drivers, each column driver of the plurality of column drivers coupled to a respective column of pixels of the plurality of columns of pixels, and each column driver of the plurality of column drivers including: 
 a local buffer amplifier coupled to the respective column of pixels; and 
 a sample switch coupled between the external buffer amplifier and the local buffer amplifier. 
   
     
     
         16 . The system of  claim 15 , wherein each column driver of the plurality of column drivers further includes a digital comparator configured to control the sample switches of the column drivers. 
     
     
         17 . The system of  claim 16 , wherein the digital comparator compares a target count signal of the image data and a ramp step signal associated with the digital ramp signal. 
     
     
         18 . The system of  claim 15 , wherein each column driver further includes a primary capacitor coupled between a local input line and a ground, the local input line coupled between the sample switch and the local buffer amplifier. 
     
     
         19 . The system of  claim 15 , wherein the pixels of the plurality of columns of pixels are further arranged into a plurality of rows of pixels, the driver further outputs commands for timing operations to write a row of the plurality of rows of pixels, and the system further comprises a row decoder for receiving the commands for timing operations. 
     
     
         20 . The system of  claim 19 , further comprising a plurality of row enable amplifiers, each row enable amplifier of the plurality of row enable amplifiers coupled between the row decoder and a respective row of the plurality of rows of pixels.