Capacitors with Barrier Dielectric Layers, and Methods of Formation Thereof

Abstract

A device including a first metal feature is disposed in a first insulating layer. A second metal feature is disposed in a second insulating layer and separated from the first metal feature by a portion of a first etch stop liner disposed between the first and the second insulating layers. The second metal feature is capacitively coupled to the first metal feature through the first etch stop liner.

What is claimed is: 
     
         1 . A device comprising:
 a first metal feature disposed in a first insulating layer; and   a second metal feature disposed in a second insulating layer and separated from the first metal feature by a portion of a first etch stop liner disposed between the first and the second insulating layers, the second metal feature being capacitively coupled to the first metal feature through the first etch stop liner.   
     
     
         2 . The device of  claim 1 , further comprising:
 a second etch stop liner disposed over the second metal feature and the second insulating layer;   a third insulating layer disposed over the second etch stop liner; and   a third metal feature disposed in the third insulating layer and separated from the second metal feature by a portion of the second etch stop liner, the third metal feature capacitively coupled to the second metal feature through the portion of the second etch stop liner.   
     
     
         3 . The device of  claim 2 , wherein the first metal feature and the third metal feature are coupled to the same potential node. 
     
     
         4 . The device of  claim 1 , wherein the first metal feature is coupled to a floating gate and the second metal feature is coupled to a control node. 
     
     
         5 . The device of  claim 1 , wherein the etch stop liner comprises a silicon nitride layer. 
     
     
         6 . The device of  claim 1 , wherein the etch stop liner separates the first insulating layer from the second insulating layer. 
     
     
         7 . The device of  claim 1 , wherein the second metal feature comprises copper. 
     
     
         8 . A device comprising:
 a first insulating layer disposed over a semiconductor substrate;   a first metal line and a second metal line disposed in the first insulating layer;   a first etch stop liner disposed over the first insulating layer;   a second insulating layer disposed over the first etch stop liner;   a first via disposed in the second insulating layer, the first via physically contacting the first metal line; and   a third metal line and a fourth metal line disposed in the second insulating layer, the third metal line physically contacting the first via at a first major surface, the fourth metal line extending beyond the first major surface to the first etch stop liner, the fourth metal line being capacitively coupled to the second metal line through the first etch stop liner.   
     
     
         9 . The device of  claim 8 , further comprising a capacitor dielectric disposed over the first etch stop liner, the capacitor dielectric covering sidewalls of the fourth metal line. 
     
     
         10 . The device of  claim 8 , further comprising:
 a second etch stop liner disposed over the second insulating layer;   a third insulating layer disposed over the second etch stop liner;   a second via disposed in the third insulating layer, the second via physically contacting the third metal line; and   a fifth metal line and a sixth metal line disposed in the third insulating layer, the fifth metal line physically contacting the second via at a second major surface, the sixth metal line extending beyond the second major surface to the second etch stop liner, the sixth metal line being capacitively coupled to the fourth metal line through the second etch stop liner.   
     
     
         11 . The device of  claim 8 , wherein the fifth metal line extends to and physically contacts the sixth metal line. 
     
     
         12 . The device of  claim 8 , wherein the fourth metal line is wider than the first via. 
     
     
         13 . The device of  claim 8 , wherein the fourth metal line is longer than the first via. 
     
     
         14 . The device of  claim 8 , wherein the first etch stop liner comprises silicon nitride. 
     
     
         15 . The device of  claim 8 , wherein the first etch stop liner comprises doped glass, boron nitride, silicon boron nitride, silicon carbon nitride, silicon germanium, germanium, or amorphous carbon. 
     
     
         16 . A device comprising:
 a first insulating layer disposed over a semiconductor substrate;   a first contact and a second contact disposed in the first insulating layer;   a first etch stop liner disposed over the first insulating layer;   a second insulating layer disposed over the first etch stop liner;   a first metal line and a second metal line disposed in the second insulating layer, the first metal line physically contacting the first contact and the second metal line physically contacting the second contact;   a second etch stop liner disposed over the second insulating layer;   a third insulating layer disposed over the second etch stop liner;   a first via disposed in the third insulating layer, the first via physically contacting the first metal line; and   a third metal line and a fourth metal line disposed in the third insulating layer, the third metal line physically contacting the first via at a first major surface, the fourth metal line extending beyond the first major surface to the second etch stop liner, the fourth metal line being capacitively coupled to the second metal line through the second etch stop liner.   
     
     
         17 . The device of  claim 16 , wherein the first etch stop liner and the second etch stop liner are different materials. 
     
     
         18 . The device of  claim 16 , further comprising:
 a third etch stop liner disposed over the third insulating layer;   a fourth insulating layer disposed over the third etch stop liner;   a second via disposed in the fourth insulating layer, the second via physically contacting the third metal line; and   a fifth metal line and a sixth metal line disposed in the fourth insulating layer, the fifth metal line physically contacting the second via at a second major surface, the sixth metal line extending beyond the second major surface to the third etch stop liner, the sixth metal line being capacitively coupled to the fourth metal line through the third etch stop liner.   
     
     
         19 . The device of  claim 18 , wherein the fifth metal line extends to and physically contacts the sixth metal line. 
     
     
         20 . The device of  claim 16 , wherein the fourth metal line is wider than the first via, wherein the fourth metal line is longer than the first via.