An apparatus and methods for sensing

Abstract

An apparatus and method wherein the apparatus comprises;a sensor arrangement comprising a plurality of sensor cells wherein a sensor cell comprises a transistor and a sensor coupled to the transistor;first selection circuitry configured to sequence a subset of sensor cells to which a gate input signal is provided, wherein the gate input signal is provided to the gate of the transistors within the sensor cells; second selection circuitry configured to sequence a subset of sensor cells from which an output signal is received;sensing signal circuitry configured to provide a sensing signal, wherein the sensors are provided between the sensing signal circuitry and the second selection circuitry such that the output signal provides an indication of the impedance of the sensors.

I/We claim: 
     
         1 - 15 . (canceled) 
     
     
         16 . An apparatus comprising;
 a sensor arrangement comprising a plurality of sensor cells wherein each sensor cell comprises a transistor and a sensor coupled to the transistor;   first circuitry configured to select a subset of the sensor cells to which a gate input signal is provided, wherein the gate input signal is provided to the gate of the transistors within the subset of sensor cells;   second circuitry configured to activate a subset of the sensor cells from which an output signal is received;   third circuitry configured to provide an input signal, wherein the sensors are connected in series between the third circuitry and the second circuitry such that the output signal provides an indication of the impedance of the sensors.   
     
     
         17 . An apparatus as claimed in  claim 16  wherein the second circuitry comprises an analogue multiplexer configured to receive a complex output signal comprising both real and imaginary components from the sensor cells. 
     
     
         18 . An apparatus as claimed in  claim 16  wherein the plurality of sensor cells are arranged in a plurality of rows and columns and the columns are orthogonal to the rows. 
     
     
         19 . An apparatus as claimed in  claim 18  wherein the first circuitry is configured to sequence through a series of different rows and the second circuitry is configured to sequence through a series of different columns. 
     
     
         20 . An apparatus as claimed in  claim 18  wherein the first circuitry is configured to sequence through a series of different columns and the second circuitry is configured to sequence through a series of different rows. 
     
     
         21 . An apparatus as claimed in  claim 16  wherein the sensor is connected in series with the transistor within the sensor cell. 
     
     
         22 . An apparatus as claimed in  claim 16  wherein the sensor is connected in parallel with the transistor within the sensor cell. 
     
     
         23 . An apparatus as claimed in  claim 16  wherein the transistor comprises a thin film transistor. 
     
     
         24 . An apparatus as claimed in  claim 16  wherein the input signal comprises an alternating current signal. 
     
     
         25 . An apparatus as claimed in  claim 16  wherein the sensor comprises a material which changes impedance in dependence on a sensed attribute. 
     
     
         26 . An apparatus as claimed in  claim 16  wherein the sensor comprises a material which changes resistance in response to the sensed attribute. 
     
     
         27 . An apparatus as claimed in  claim 16  wherein the sensor comprises a material which changes permittivity in response to the sensed attribute. 
     
     
         28 . An apparatus as claimed in  claim 16  further comprising at least one transmitter configured to transmit information obtained from the output signal. 
     
     
         29 . A communication device comprising an apparatus comprising;
 a sensor arrangement comprising a plurality of sensor cells wherein each sensor cell comprises a transistor and a sensor coupled to the transistor;   first circuitry configured to select a subset of the sensor cells to which a gate input signal is provided, wherein the gate input signal is provided to the gate of the transistors within the subset of sensor cells;   second circuitry configured to activate a subset of the sensor cells from which an output signal is received;   third circuitry configured to provide an input signal, wherein the sensors are connected in series between the third circuitry and the second circuitry such that the output signal provides an indication of the impedance of the sensors.   
     
     
         30 . A communication device as claimed in  claim 29 , wherein the second circuitry comprises an analogue multiplexer configured to receive a complex output signal comprising both real and imaginary components from the sensor cells. 
     
     
         31 . A communication device as claimed in  claim 29 , wherein the plurality of sensor cells are arranged in a plurality of rows and columns and the columns are orthogonal to the rows. 
     
     
         32 . A method comprising;
 providing a sensor arrangement comprising a plurality of sensor cells wherein each sensor cell comprises a transistor and a sensor coupled to the transistor;   providing first circuitry configured to select a subset of the sensor cells to which a gate input signal is provided, wherein the gate input signal is provided to the gate of the transistors within the subset of sensor cells;   providing second circuitry configured to select a subset of the sensor cells from which an output signal is received;   providing third circuitry configured to provide an input signal, wherein the sensors are connected in series between the third circuitry and the second circuitry such that the output signal provides an indication of the impedance of the sensors.   
     
     
         33 . A method as claimed in  claim 32  wherein the second circuitry comprises an analogue multiplexer configured to receive a complex output signal comprising both real and imaginary components from the sensor cells. 
     
     
         34 . A method as claimed in  claim 32  wherein the plurality of sensor cells are arranged in a plurality of rows and columns and the columns are orthogonal to the rows. 
     
     
         35 . A method as claimed in  claim 34  wherein the first circuitry is configured to sequence through a series of different rows and the second circuitry is configured to sequence through a series of different columns. 
     
     
         36 . A method as claimed in  claim 34  wherein the first circuitry is configured to sequence through a series of different columns and the second circuitry is configured to sequence through a series of different rows.