Methods for forming mask layers using a flowable carbon-containing silicon dioxide material

Abstract

One method disclosed herein includes, among other things, forming a process layer on a substrate. A patterned mask layer is formed above the process layer. The patterned mask layer includes first openings exposing portions of the process layer. A carbon-containing silicon dioxide layer is formed above the patterned mask layer and in the first openings. The carbon-containing silicon dioxide layer is planarized to remove portions extending outside the first openings and generate a plurality of mask elements from remaining portions of the carbon-containing silicon dioxide layer. The patterned mask layer is removed. The process layer is etched using the mask elements as an etch mask.

What is claimed: 
     
         1 . A method, comprising:
 forming a process layer on a substrate;   forming a patterned mask layer above said process layer, said patterned mask layer including first openings exposing portions of said process layer;   forming a carbon-containing silicon dioxide layer above said patterned mask layer and in said first openings;   planarizing said carbon-containing silicon dioxide layer to remove portions extending outside said first openings and generate a plurality of mask elements from remaining portions of said carbon-containing silicon dioxide layer;   removing said patterned mask layer; and   etching said process layer using said mask elements as an etch mask.   
     
     
         2 . The method of  claim 1 , wherein said carbon-containing silicon dioxide layer comprises SiOC. 
     
     
         3 . The method of  claim 1 , wherein said carbon-containing silicon dioxide layer comprises SiOCN. 
     
     
         4 . The method of  claim 1 , wherein said process layer comprises a dielectric layer, and etching said process layer comprises forming recesses in said process layer. 
     
     
         5 . The method of  claim 1 , wherein said process layer comprises a semiconductor layer, and etching said process layer comprises forming raised features in said process layer. 
     
     
         6 . The method of  claim 5 , wherein said raised features comprise fins. 
     
     
         7 . The method of  claim 1 , wherein said first openings have a uniform pitch and uniform dimensions. 
     
     
         8 . The method of  claim 1 , wherein at least one of a pitch or a dimension of said first openings is non-uniform. 
     
     
         9 . The method of  claim 1 , wherein said mask elements comprise line-type elements. 
     
     
         10 . The method of  claim 1 , wherein said mask elements comprise pillars. 
     
     
         11 . The method of  claim 1 , wherein forming said patterned mask layer comprises:
 forming a hard mask layer above said process layer;   forming a patterned resist layer above said hard mask layer; and   etching said hard mask layer using said patterned resist layer to define said first openings and form said patterned mask layer.   
     
     
         12 . A method, comprising:
 forming a patterned mask layer above a semiconductor layer, said patterned mask layer including first openings exposing portions of said semiconductor layer;   forming a carbon-containing silicon dioxide layer above said patterned mask layer and in said first openings;   planarizing said carbon-containing silicon dioxide layer to remove portions extending outside said first openings and generate a plurality of mask elements from remaining portions of said carbon-containing silicon dioxide layer;   removing said patterned mask layer; and   etching said semiconductor layer using said mask elements as an etch mask to define a plurality of fins in said semiconductor layer.   
     
     
         13 . The method of  claim 12 , wherein said carbon-containing silicon dioxide layer comprises SiOC. 
     
     
         14 . The method of  claim 12 , wherein said carbon-containing silicon dioxide layer comprises SiOCN. 
     
     
         15 . The method of  claim 12 , further comprising removing said mask elements after etching said semiconductor layer. 
     
     
         16 . The method of  claim 12 , wherein said first openings have a uniform pitch and uniform dimensions. 
     
     
         17 . The method of  claim 12 , wherein at least one of a pitch or a dimension of said first openings is non-uniform. 
     
     
         18 . The method of  claim 12 , wherein forming said patterned mask layer comprises:
 forming a hard mask layer above said process layer;   forming a patterned resist layer above said hard mask layer; and   etching said hard mask layer using said patterned resist layer to define said first openings and form said patterned mask layer.