Photomask layouts and methods of forming patterns using the same

Abstract

A photomask layout includes: a substrate region; a lower stepped region at a region of the substrate region; and a pattern region at least partially crossing the lower stepped region and including at least one notch portion at an area overlapping the lower stepped region. A method of forming a pattern is also provided.

What is claimed is: 
     
         1 . A photomask layout comprising:
 a substrate region;   a lower stepped region at a region of the substrate region; and   a pattern region at least partially crossing the lower stepped region, the pattern region including at least one notch portion at an area overlapping the lower stepped region.   
     
     
         2 . The photomask layout of  claim 1 , wherein the at least one notch portion is positioned at a boundary area in which the pattern region overlaps the lower stepped region. 
     
     
         3 . The photomask layout of  claim 1 , wherein the at least one notch portion is positioned at an intersection region of the lower stepped region and the pattern region. 
     
     
         4 . The photomask layout of  claim 3 , wherein the at least one notch portion is positioned at at least one vertex of the intersection region. 
     
     
         5 . The photomask layout of  claim 4 , wherein the pattern region completely crosses the lower stepped region, and the at least one notch portion includes four notch portions positioned at the intersection region. 
     
     
         6 . The photomask layout of  claim 4 , wherein the pattern region partially crosses the lower stepped region, and the at least one notch portion includes two notch portions positioned at the intersection region. 
     
     
         7 . The photomask layout of  claim 3 , wherein the pattern region crosses a plurality of the lower stepped region, and the at least one notch portion includes a number of notch portions that is a multiple of four. 
     
     
         8 . The photomask layout of  claim 1 , wherein the lower stepped region corresponds to an active pattern or a lower wiring on a display substrate, and the pattern region corresponds to an upper wiring on the active pattern or the lower wiring.