Semiconductor device having side-diffused trench plug

Abstract

A semiconductor device structure may include a substrate having a substrate base comprising a first dopant type; a semiconductor layer disposed on a surface of the substrate base, the semiconductor layer comprising a second dopant type and having an upper surface; and a semiconductor plug assembly comprising a semiconductor plug disposed within the semiconductor layer, the semiconductor plug extending from an upper surface of the semiconductor layer and having a depth at least equal to a thickness of the semiconductor layer, the semiconductor plug having a first boundary, the first boundary formed within the semiconductor layer, and having a second boundary, the second boundary formed within the semiconductor layer and disposed opposite the first boundary, wherein the first boundary and second boundary extend perpendicularly to the surface of the substrate base.

1 . A semiconductor device structure, comprising:
 a substrate having a substrate base comprising a first dopant type and having a substrate base surface;   a semiconductor layer disposed on the substrate base surface, the semiconductor layer comprising a second dopant type and having an upper surface; and   a semiconductor plug assembly comprising a semiconductor plug disposed within the semiconductor layer, the semiconductor plug extending from the upper surface of the semiconductor layer and having a depth at least equal to a thickness of the semiconductor layer, the semiconductor plug having a first boundary and a second boundary disposed opposite the first boundary, the first boundary and the second boundary being formed within the semiconductor layer, wherein the first boundary and second boundary extend perpendicularly to the substrate base surface, wherein the semiconductor plug comprises:
 a trench having a first trench sidewall and a second trench sidewall, the first trench sidewall and second trench sidewall defining a first interface and a second interface, respectively, with the semiconductor layer, wherein the first trench sidewall and the second trench sidewall extend perpendicularly to the substrate base surface, and 
 a diffused region extending within the semiconductor layer from the first trench sidewall and the second trench sidewall to the first boundary and the second boundary, respectively, 
 wherein the first boundary and the second boundary define a boundary between the semiconductor plug and the semiconductor layer. 
   
     
     
         2 . The semiconductor device structure of  claim 1 , wherein the semiconductor plug comprises the first dopant type, the semiconductor device further comprising:
 a first device formed in a first region, and being at least partially within the semiconductor layer; and   a second device formed in a second region, and being at least partially within the semiconductor layer, the first region being laterally displaced from the second region, wherein the semiconductor plug is disposed between the first device and second device and electrically isolates the first device from the second device.   
     
     
         3 . The semiconductor device structure of  claim 1 , wherein the semiconductor plug comprises the second dopant type, wherein the semiconductor layer has a first concentration of the second dopant type, wherein the semiconductor plug has a second concentration of the second dopant type, and wherein the second concentration is greater than the first concentration. 
     
     
         4 . (canceled) 
     
     
         5 . The semiconductor device structure of  claim 1 , wherein the trench is filled with a fill material. 
     
     
         6 . The semiconductor device structure of  claim 5 , wherein the fill material is polysilicon or doped polysilicon. 
     
     
         7 . The semiconductor device of  claim 1 , wherein the semiconductor plug has a plug width between the first boundary and second boundary of 3 μm to 6 μm. 
     
     
         8 . The semiconductor device structure of  claim 1 , wherein the semiconductor plug assembly comprises at least one additional semiconductor plug, wherein the semiconductor plug comprises a first semiconductor plug, wherein the at least one additional semiconductor plug is disposed adjacent the first semiconductor plug, and wherein the semiconductor plug assembly comprises a dopant of the second type. 
     
     
         9 . The semiconductor device structure of  claim 2 , wherein the semiconductor plug comprises a first semiconductor plug, the semiconductor plug assembly further comprising:
 a second semiconductor plug comprising the second dopant type, wherein the semiconductor layer has a first concentration of the second dopant type, wherein the second semiconductor plug has a second concentration of the second dopant type, and wherein the second concentration is greater than the first concentration,   wherein the second semiconductor plug is formed within the first region.   
     
     
         10 . A method of forming a semiconductor plug in a substrate, comprising:
 providing a semiconductor layer on a substrate base surface of a substrate base, the substrate base comprising a first dopant type, and the semiconductor layer comprising a second dopant type;   etching a trench into the semiconductor layer, wherein the trench has a first trench sidewall and a second trench sidewall, the first trench sidewall and second trench sidewall defining a first interface and a second interface, respectively, with the semiconductor layer;   forming a dopant layer along the first trench sidewall and second trench sidewall; and   annealing the substrate, wherein a diffused region is formed, the diffused region having a first boundary and a second boundary, the first boundary and the second boundary extending within the semiconductor layer from the first trench sidewall and the second trench sidewall, wherein the first boundary and the second boundary define a boundary between the semiconductor plug and the semiconductor layer.   
     
     
         11 . The method of  claim 10 , wherein the semiconductor plug comprises the first dopant type, the method further comprising:
 providing a first device in a first region of the substrate, the first device being at least partially disposed within the semiconductor layer; and   providing a second device in a second region of the substrate, the second device being at least partially disposed within the semiconductor layer, the first region being laterally displaced from the second region, wherein the semiconductor plug is disposed between the first device and second device and electrically isolates the first device from the second device.   
     
     
         12 . The method of  claim 10 , wherein the semiconductor plug comprises the second dopant type, wherein the semiconductor layer has a first concentration of the second dopant type, wherein the semiconductor plug has a second concentration of the second dopant type, and wherein the second concentration is greater than the first concentration. 
     
     
         13 . The method of  claim 10 , further comprising, after the forming the dopant layer, filling the trench with a fill material. 
     
     
         14 . The method of  claim 13 , wherein the fill material is polysilicon or doped silicon. 
     
     
         15 . The method of  claim 10 , wherein the semiconductor plug has a plug width between the first boundary and second boundary of 3 μm to 6 μm. 
     
     
         16 . The method of  claim 10 , wherein the semiconductor plug comprises a first semiconductor plug, the method further comprising: forming at least one additional semiconductor plug adjacent the first semiconductor plug so as to form a semiconductor plug assembly, and wherein the semiconductor plug assembly comprises the second dopant type. 
     
     
         17 . The method of  claim 11 , wherein the semiconductor plug comprises a first semiconductor plug comprising the first dopant type and being formed within a first region, the method further comprising:
 forming a second semiconductor plug comprising the second dopant type,   wherein the semiconductor layer has a first concentration of the second dopant type, wherein the second semiconductor plug has a second concentration of the second dopant type, wherein the second concentration is greater than the first concentration, and wherein the second semiconductor plug is formed within a second region, the second region being laterally displaced from the first region.