Solid-state imaging device and method for fabricating same
Abstract
A solid-state imaging device includes a plurality of pixels two-dimensionally arrayed in a well region disposed on a semiconductor substrate, each pixel including a photoelectric conversion section having a charge accumulation region which accumulates signal charge; an element isolation layer which is disposed on the surface of the well region along the peripheries of the individual charge accumulation regions and which electrically isolates the individual pixels from each other; and a diffusion layer which is disposed beneath the element isolation layer and which electrically isolates the individual pixels from each other, the diffusion layer having a smaller width than that of the element isolation layer. Each charge accumulation region is disposed so as to extend below the element isolation layer and be in contact with or in close proximity to the diffusion layer.
Claims
exact text as granted — not AI-modified1 - 6 . (canceled)
7 . A solid-state imaging device comprising:
a charge accumulation region of a first conductivity type in a semiconductor substrate; an accumulation layer of a second conductivity type in the semiconductor substrate; a first diffusion region of the second conductivity type in the semiconductor substrate; and a second diffusion region of the second conductivity type in the semiconductor substrate, wherein the accumulation layer is between the first diffusion region and the second diffusion region, wherein the charge accumulation region is between the first diffusion region and the second diffusion region, and wherein the first diffusion region, the second diffusion region and the charge accumulation region touch the accumulation layer.
8 . The solid-state imaging device according to claim 7 , further comprising:
an insulating film over the semiconductor substrate.
9 . The solid-state imaging device according to claim 7 , further comprising:
a first element isolation layer over the first diffusion region.
10 . The solid-state imaging device according to claim 9 , wherein the first diffusion region extends into the semiconductor substrate from the first element isolation layer.
11 . The solid-state imaging device according to claim 9 , wherein the first element isolation layer is silicon oxide.
12 . The solid-state imaging device according to claim 9 , further comprising:
a second element isolation layer over the second diffusion region.
13 . The solid-state imaging device according to claim 12 , wherein the second element isolation layer is silicon oxide.
14 . The solid-state imaging device according to claim 12 , wherein the second diffusion region extends into the semiconductor substrate from the second element isolation layer.
15 . The solid-state imaging device according to claim 12 , wherein the second element isolation layer touches the second diffusion region.
16 . The solid-state imaging device according to claim 15 , wherein the first element isolation layer touches the first diffusion region.
17 . The solid-state imaging device according to claim 12 , wherein the first element isolation layer and the second element isolation layer touch the accumulation layer.
18 . The solid-state imaging device according to claim 17 , wherein a boundary between the first diffusion region and the accumulation layer touches the first element isolation layer.
19 . The solid-state imaging device according to claim 18 , wherein a boundary between the second diffusion region and the accumulation layer touches the second element isolation layer.
20 . The solid-state imaging device according to claim 7 , wherein the first conductivity type is N-type and the second conductivity type is P-type.
21 . The solid-state imaging device according to claim 7 , wherein the first conductivity type is opposite to the second conductivity type.
22 . The solid-state imaging device according to claim 7 , wherein the charge accumulation region touches the first diffusion region and the second diffusion region.
23 . The solid-state imaging device according to claim 7 , wherein the charge accumulation region touches a portion of the semiconductor substrate.
24 . The solid-state imaging device according to claim 23 , wherein the charge accumulation region is between the accumulation layer and the portion of the semiconductor substrate.
25 . The solid-state imaging device according to claim 23 , wherein the portion of the semiconductor substrate is of the second conductivity type.
26 . The solid-state imaging device according to claim 25 , wherein more acceptor ions are in the accumulation layer than are in the portion of the semiconductor substrate.
27 . The solid-state imaging device according to claim 25 , wherein more acceptor ions are in the first diffusion region than are in the portion of the semiconductor substrate.
28 . The solid-state imaging device according to claim 25 , wherein more acceptor ions are in the second diffusion region than are in the portion of the semiconductor substrate.
29 . The solid-state imaging device according to claim 23 , wherein the portion of the semiconductor substrate is between the first diffusion region and the second diffusion region.
30 . The solid-state imaging device according to claim 29 , wherein the portion of the semiconductor substrate touches the first diffusion region and the second diffusion region.
31 . The solid-state imaging device according to claim 7 , wherein donor ions are in the charge accumulation region.
32 . The solid-state imaging device according to claim 7 , wherein more acceptor ions are in the accumulation layer than are in the first diffusion region.
33 . The solid-state imaging device according to claim 7 , wherein more acceptor ions are in the accumulation layer than are in the second diffusion region.Join the waitlist — get patent alerts
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