US2017372887A1PendingUtilityA1

Trench formation method for releasing a substrate from a semiconductor template

Assignee: SOLEXEL INCPriority: Feb 6, 2009Filed: May 16, 2016Published: Dec 28, 2017
Est. expiryFeb 6, 2029(~2.5 yrs left)· nominal 20-yr term from priority
H10P 95/112H10P 95/11H10P 14/2925F16L 21/035B81C 2201/0132B81C 2201/0133B81C 2201/0143H01L 21/0243H10F 77/14H10F 71/1395H10F 71/1221H10F 71/121Y02P70/50B81C 1/00063Y02E10/547Y02E10/546
49
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Claims

Abstract

A method is provided for fabricating a thin-film semiconductor substrate by forming a porous semiconductor layer conformally on a reusable semiconductor template and then forming a thin-film semiconductor substrate conformally on the porous semiconductor layer. An inner trench having a depth less than the thickness of the thin-film semiconductor substrate is formed on the thin-film semiconductor substrate. An outer trench providing access to the porous semiconductor layer is formed on the thin-film semiconductor substrate and is positioned between the inner trench and the edge of the thin-film semiconductor substrate. The thin-film semiconductor substrate is then released from the reusable semiconductor template.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method for fabrication of a thin-film semiconductor substrate, the method comprising:
 forming a porous semiconductor layer on a reusable semiconductor template, said porous semiconductor layer conformal to said reusable semiconductor template;   forming a thin-film semiconductor substrate on said porous semiconductor layer, said thin-film semiconductor substrate conformal to said porous semiconductor layer;   forming an inner trench on said thin-film semiconductor substrate having a depth less than a thickness of said thin-film semiconductor substrate;   forming an outer trench on said thin-film semiconductor substrate providing access to said porous semiconductor layer and positioned between said inner trench and an edge of said thin-film semiconductor substrate; and   releasing said thin-film semiconductor substrate from said reusable semiconductor template.   
     
     
         2 . The method of  claim 1 , wherein said thin-film semiconductor substrate is a silicon thin-film semiconductor substrate. 
     
     
         3 . The method of  claim 1 , wherein said porous semiconductor layer is a porous silicon layer. 
     
     
         4 . The method of  claim 1 , wherein said reusable semiconductor template is a silicon template made of a silicon wafer. 
     
     
         5 . The method of  claim 1 , wherein said thin-film semiconductor substrate is substantially planar. 
     
     
         6 . The method of  claim 1 , wherein said thin-film semiconductor substrate is three-dimensional. 
     
     
         7 . The method of  claim 1 , wherein said inner trench is aligned along a crystallographic direction of said thin-film semiconductor substrate. 
     
     
         8 . The method of  claim 1 , further comprising the step of dividing the released thin-film semiconductor substrate at said inner trench. 
     
     
         9 . The method of  claim 1 , further comprising the step of breaking the released thin-film semiconductor substrate at said inner trench according to a mechanical snapping method using said first trench as a cleaving line. 
     
     
         10 . The method of  claim 1 , wherein said first trench is created according to a laser cutting process. 
     
     
         11 . The method of  claim 1 , wherein said outer trench is created according to a laser cutting process. 
     
     
         12 . The method of  claim 1 , wherein said inner trench is created according to a mechanical scribing process. 
     
     
         13 . The method of  claim 1 , wherein said outer trench is created according to a mechanical scribing process. 
     
     
         14 . The method of  claim 1 , wherein said inner trench is created according to a silicon reactive ion etching (RIE) etching process. 
     
     
         15 . The method of  claim 1 , wherein said outer trench is created according to a silicon reactive ion etching (RIE) etching process. 
     
     
         16 . The method of  claim 1 , wherein said outer trench is located at an edge of said reusable semiconductor template and is formed according to a mechanical lapping, grinding, or polishing process. 
     
     
         17 . The method of  claim 1 , wherein said inner trench is created according to an anisotropic silicon wet etching process. 
     
     
         18 . The method of  claim 1 , wherein said outer trench is created according to an anisotropic silicon wet etching process. 
     
     
         19 . The method of  claim 1 , wherein said inner trench is created according to an anodic silicon etching process. 
     
     
         20 . The method of  claim 1 , wherein said outer trench is created according to an anodic silicon etching process.

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