US2017365575A1PendingUtilityA1

Packaged IC With Solderable Sidewalls

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Assignee: TEXAS INSTRUMENTS INCPriority: Dec 3, 2015Filed: Aug 29, 2017Published: Dec 21, 2017
Est. expiryDec 3, 2035(~9.3 yrs left)· nominal 20-yr term from priority
Inventors:Yong LinVikas GuptaRongwei Zhang
H10P 72/7416H10P 54/00H10W 90/756H10W 90/736H10W 90/726H10W 74/111H10W 74/00H10W 72/07337H10W 72/07336H10W 72/07236H10W 72/5363H10W 72/01365H10W 72/01323H10W 72/884H10W 72/536H10W 72/354H10W 72/352H10W 72/344H10W 72/325H10W 72/252H10W 72/075H10W 46/501H10W 46/301H10W 42/121H10W 74/129H10W 74/016H10W 74/014H10W 72/0198H10W 70/465H10W 70/464H10W 70/457H10W 70/424H10W 70/421H10W 70/411H10W 70/041H10W 46/00H10W 20/20H10W 72/072H10P 52/00H01L 2224/29034H01L 21/78H01L 2224/29139H01L 2224/29155H01L 2224/29111H01L 2224/29169H01L 21/4825H01L 2223/54453H01L 23/49503H01L 2224/27318H01L 2224/2732H01L 24/27H01L 21/304H01L 23/544H01L 2223/54426H01L 2224/29144H01L 2221/68327H01L 2224/27848H01L 2224/29147H01L 2224/29164H01L 21/565H01L 24/29H01L 23/3114H01L 23/49541H01L 23/4952
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Claims

Abstract

A packaged IC wherein a portion of the sidewalls of the packaged IC are solderable metal. A method of forming a packaged IC wherein a portion of the sidewalls of the wire bond pads or the flip chip pads that are exposed by sawing during singulation are solderable metal. A method of forming a packaged IC wherein all of the sidewalls of the wire bond pads or the flip chip pads that are exposed by sawing during singulation are solderable metal and a portion of sidewall of the molding compound is solderable metal.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A packaged IC comprising:
 an IC chip;   an IC chip pad coupled to the IC chip;   a wire bond pad or a flip chip pad coupled to the IC chip, the wire bond pad or flip chip pad having an exposed sidewall;   molding compound encapsulating the IC chip, a portion of the IC chip pad, and a portion of the wire bond pad, the molding compound having a sidewall; and   a first solderable metal extending from a bottom surface of the packaged IC along a sidewall of the packaged IC.   
     
     
         2 . The packaged IC chip of  claim 1  wherein greater than about 0% and less than about 100% of the sidewall of the wire bond pad or the flip chip pad is exposed. 
     
     
         3 . The packaged IC chip of  claim 1 , wherein 0% of the sidewall of the wire bond pad or the flip chip pad exposed. 
     
     
         4 . The packaged IC chip of  claim 3  wherein greater than about 0% and less than about 100% of the sidewall of the molding compound is exposed. 
     
     
         5 . The packaged IC chip of  claim 1 , further comprising a second solderable metal extending from the first solderable metal along the sidewall of the packaged IC. 
     
     
         6 . The packaged IC of  claim 5 , wherein the first solderable metal and the second solderable metal are different metals. 
     
     
         7 . The packaged IC of  claim 4 , wherein the first solderable metal and the second solderable metal are the same metal. 
     
     
         8 . The packaged IC of  claim 1 , wherein the first solderable metal is selected from the group consisting of:
 silver,   an alloy of silver,   an alloy of silver and tin,   an alloy of silver and tin and copper,   gold,   an alloy of gold and tin,   palladium   nickel   an alloy of nickel and palladium,   an alloy of nickel and palladium, and gold,   solder, and   platinum.

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