Electronic device and method for fabricating the same

Abstract

An electronic device including a semiconductor memory is provided. The semiconductor memory includes an interlayer dielectric layer disposed over a substrate, and having a recess which exposes a portion of the substrate; a bottom contact partially filling the recess; and a resistance variable element including a bottom layer which fills at least a remaining space of the recess over the bottom contact, and a remaining layer which is disposed over the bottom layer and protrudes out of the interlayer dielectric layer.

1 - 11 . (canceled) 
     
     
         12 . A method for fabricating an electronic device including a semiconductor memory, the method comprising:
 forming an interlayer dielectric layer on a substrate to provide a space for forming a bottom contact and at least a portion of a magnetic resistance element;   forming the bottom contact and the portion of the magnetic resistance element to locate inside the interlayer dielectric layer; and   forming remaining portions of the magnetic resistance element over the interlayer dielectric layer.   
     
     
         13 . The method of  claim 12 , the forming of the interlayer dielectric layer including:
 forming a recess in the interlayer dielectric layer to have a wine glass shape.   
     
     
         14 . The method of  claim 12 , the forming of the interlayer dielectric layer including:
 forming a recess in the interlayer dielectric layer to have a downwardly decreasing width.   
     
     
         15 . The method of  claim 12 , wherein the portion of the magnetic resistance element located inside the interlayer dielectric layer has a thickness determined based on a size of patternable portion of the magnetic resistance element. 
     
     
         16 . The method of  claim 12 , wherein the space has a top surface with a width greater than a width of a bottom surface of the space. 
     
     
         17 . The method of  claim 13 , wherein the forming of the recess comprises:
 forming a hard mask pattern over the interlayer dielectric layer to have an opening with a width smaller than the width of the top end of the recess;   isotropically etching a portion of the interlayer dielectric layer which is exposed through the hard mask pattern; and   unisotropically etching the interlayer dielectric layer which is exposed through the hard mask pattern until the substrate is exposed.   
     
     
         18 . The method according to  claim 13 , wherein the forming of the recess comprises:
 forming a hard mask pattern having an opening of which width is substantially the same as the width of the top end of the recess, over the interlayer dielectric layer; and   etching the interlayer dielectric layer which is exposed through the hard mask pattern, such that a width of the recess gradually decreases towards the substrate.   
     
     
         19 . The method according to  claim 13 , wherein the forming of the recess comprises:
 forming a first photoresist pattern over the interlayer dielectric layer to have an opening with a width smaller than the width of the top end of the recess;   forming a second photoresist over the first photoresist pattern and the interlayer dielectric layer;   forming a second photoresist pattern through exposure and development processes with regard to the second photoresist to have an opening with a width smaller than the width of the top end of the recess, wherein the development process of the second photoresist causes the opening of the first photoresist pattern increases; and   etching the interlayer dielectric layer using the first photoresist pattern with the increased opening and the second photoresist pattern as etch barriers.   
     
     
         20 . The method according to  claim 13 , wherein the forming of the recess includes:
 forming a first photoresist pattern over the interlayer dielectric layer to have an opening with a width smaller than the width of the top end of the recess;   forming a water-soluble polymer layer to cover the first photoresist pattern;   forming a second photoresist pattern over the water-soluble polymer layer having an opening with a width greater than the opening of the first photoresist pattern;   removing a portion of the water-soluble polymer layer which is exposed through the second photoresist pattern; and   etching the interlayer dielectric layer using the first photoresist pattern and the second photoresist pattern as etch barriers.   
     
     
         21 . The method according to  claim 12 , wherein the forming of the bottom contact and the portion of the magnetic resistance element includes:
 forming a conductive material to fill the space; and   performing a planarization process to expose the interlayer dielectric layer.   
     
     
         22 . The method according to  claim 12 , wherein the forming of the remaining portions includes:
 forming a stack structure including a first magnetic layer, a tunnel barrier layer and a second magnetic layer over the interlayer dielectric layer.   
     
     
         23 . The method according to  claim 12 , wherein the forming of the interlayer dielectric layer includes selectively etching the interlayer dielectric layer. 
     
     
         24 . The method according to  claim 12 , wherein the substrate has a uniform thickness along a horizontal direction. 
     
     
         25 . The method according to  claim 12 , wherein the forming of the bottom contact and the portion of the magnetic resistance element includes providing a bottom layer of the magnetic resistance element over a top surface of the bottom contact. 
     
     
         26 . The method according to  claim 12 , wherein the forming of the remaining portions of the magnetic resistance element includes forming a stack structure including a first magnetic layer, a tunnel barrier layer and a second magnetic layer to cause an entire stack structure to be disposed over the bottom contact. 
     
     
         27 . The method according to  claim 12 , wherein the forming of the resistance variable element includes forming a stack structure including a first magnetic layer and a second magnetic layer, the resistance variable element having a resistance value that varies according to the magnetization directions of the first magnetic layer and the second magnetic layer. 
     
     
         28 . The method according to  claim 12 , wherein the forming of the bottom contact and the portion of the magnetic resistance element includes forming the bottom contact with a first material and providing the portion of the magnetic resistance element with a second material different from the first material. 
     
     
         29 . The method according to  claim 12 , wherein the forming of the remaining portions of the magnetic resistance element includes constructing an entire bottom surface of the remaining portions to overlap with a top of the space.