Semiconductor chips having through silicon vias and related fabrication methods and semiconductor packages

Abstract

A semiconductor chip including through silicon vias (TSVs), wherein the TSVs may be prevented from bending and the method of fabricating the semiconductor chip may be simplified, and a method of fabricating the semiconductor chip. The semiconductor chip includes a silicon substrate having a first surface and a second surface; a plurality of TSVs which penetrate the silicon substrate and protrude above the second surface of the silicon substrate; a polymer pattern layer which is formed on the second surface of the silicon substrate, surrounds side surfaces of the protruding portion of each of the TSVs, and comprises a flat first portion and a second portion protruding above the first portion; and a plated pad which is formed on the polymer pattern layer and covers a portion of each of the TSVs exposed from the polymer pattern layer.

1 . A semiconductor device comprising:
 a semiconductor substrate having a first surface and a second surface that are opposite to each other;   a through silicon via penetrating the semiconductor substrate and having a protrusion that protrudes over the second surface of the semiconductor substrate;   a connecting member disposed over the first surface of the semiconductor substrate and electrically coupled to the through silicon via;   a polymer pattern layer disposed over the second surface of the semiconductor substrate to enclose a portion of the protrusion of the through silicon via; and   a capping metal layer covering an upper surface and a sidewall of a remaining portion of the protrusion of the through silicon via, and extending over a portion of the polymer pattern layer   
     
     
         2 . The semiconductor device of  claim 1 , wherein the first surface of the semiconductor substrate is an active surface, and
 the second surface of the semiconductor substrate is an inactive surface.   
     
     
         3 . The semiconductor device of  claim 1 , wherein the through silicon via includes a first end surface disposed at the same side as the first surface of the semiconductor substrate and a second end surface disposed at the same side as the second surface of the semiconductor substrate. 
     
     
         4 . The semiconductor device of  claim 3 , wherein the capping metal layer contacts the second end surface of the through silicon via, a sidewall of an upper portion of the protrusion of the through silicon via, and a surface of the polymer pattern layer. 
     
     
         5 . The semiconductor device of  claim 1 , wherein the through silicon via includes a copper material. 
     
     
         6 . The semiconductor device of  claim 1 , wherein the polymer pattern layer encloses a sidewall of a lower portion of the protrusion of the through silicon via. 
     
     
         7 . The semiconductor device of  claim 1 , wherein the polymer pattern layer is formed of poly-2-methoxyethylacrylate (PMEA), a polystyrene-based resin, or a polyimide-based resin. 
     
     
         8 . The semiconductor device of  claim 1 , further comprising an insulation layer disposed over the first surface of the semiconductor substrate. 
     
     
         9 . The semiconductor device of  claim 1 , wherein the connecting member includes a metal pillar and a bump disposed over a surface of the metal pillar opposite to the through silicon via. 
     
     
         10 . The semiconductor device of  claim 1 , wherein a thickness of the polymer pattern layer is not uniform. 
     
     
         11 . A semiconductor device comprising:
 a semiconductor substrate having a first surface and a second surface that are opposite to each other;   a through silicon via penetrating the semiconductor substrate and having a protrusion that protrudes over the second surface of the semiconductor substrate;   a connecting member disposed over the first surface of the semiconductor substrate and electrically coupled to the through silicon via;   a polymer pattern layer disposed over the second surface of the semiconductor substrate to enclose a portion of the protrusion of the through silicon via; and   a barrier metal covering an upper surface of the protrusion of the through silicon via,   wherein the polymer pattern layer is formed of poly-2-methoxyethylacrylate (PMEA), a polystyrene-based resin, or a polyimide-based resin.   
     
     
         12 . The semiconductor device of  claim 11 , further comprising a pad that includes:
 a seed metal layer covering a top end surface of the through silicon via and a sidewall of an upper portion of the protrusion of the through silicon via and extending over the polymer pattern layer.   
     
     
         13 . The semiconductor device of  claim 12 , wherein the pad is formed of Au, Ni/Au or Ni/Pd/Au. 
     
     
         14 . The semiconductor device of  claim 11 , further comprising a bump or a solder ball to which the through silicon via is attached. 
     
     
         15 . The semiconductor device of  claim 11 , wherein the connecting member is formed of Al, Ni, Au, Sn, Pd, Ag, or an alloy thereof. 
     
     
         16 . The semiconductor device of  claim 11 , wherein the barrier metal is formed of Ni or Ti/Cu. 
     
     
         17 . The semiconductor device of  claim 11 , wherein the barrier metal covers a sidewall of a remaining portion of the protrusion of the through silicon via, and extends over a portion of the polymer pattern layer. 
     
     
         18 . A semiconductor device comprising:
 a semiconductor substrate having a first surface and a second surface that are opposite to each other;   a through silicon via penetrating the semiconductor substrate and having a protrusion that protrudes over the second surface of the semiconductor substrate;   a first bump disposed over the first surface of the semiconductor substrate and electrically coupled to the through silicon via;   a polymer pattern layer disposed over the second surface of the semiconductor substrate to enclose a portion of the protrusion of the through silicon via; and   a second bump covering an upper surface and a sidewall of a remaining portion of the protrusion of the through silicon via, and extending over a portion of the polymer pattern layer,   wherein a thickness of the polymer pattern layer is not uniform.   
     
     
         19 . The semiconductor device of  claim 18 , wherein the polymer pattern layer is formed of poly-2-methoxyethylacrylate (PMEA), a polystyrene-based resin or a polyimide-based resin. 
     
     
         20 . The semiconductor device of  claim 18 , further comprising:
 a circuit layer disposed on the first surface of the semiconductor substrate; and   an insulation layer disposed on the circuit layer.