Semiconductor device and memory device
Abstract
A semiconductor device that can measure a minute current. The semiconductor device includes a first transistor, a second transistor, a node, and a capacitor. The first transistor includes an oxide semiconductor in a channel formation region. The node is electrically connected to a gate of the second transistor and a first terminal of the capacitor. The node is brought into an electrically floating state by turning off the first transistor after a potential V 0 is supplied. Change in a potential V FN of the node over time is expressed by Formula (1). In Formula (1), t is elapsed time after the node is brought into the electrically floating state, τ is a constant with a unit of time, and β is a constant greater than or equal to 0.4 and less than or equal to 0.6. V FN ( t ) = V 0 × e - ( t τ ) β ( 1 )
Claims
exact text as granted — not AI-modified1 . (canceled)
2 . A semiconductor device comprising:
a memory cell; and an inverter, wherein the memory cell comprises:
a first transistor;
a second transistor; and
a capacitor,
wherein the first transistor comprises an oxide semiconductor in a channel formation region, wherein a gate of the second transistor and a first terminal of the capacitor are electrically connected to a node, wherein one of a source and a drain of the second transistor is electrically connected to an input terminal of the inverter, wherein an output terminal of the inverter is electrically connected to an output terminal, wherein the node is configured to be supplied with a potential V 0 through the first transistor, wherein the node is configured to be brought into an electrically floating state by turning off the first transistor after the potential V 0 is supplied, and wherein change in a potential V FN of the node with respect to time is expressed by Formula (1):
V
FN
(
t
)
=
V
0
×
e
-
(
t
τ
)
β
,
(
1
)
where t is elapsed time after the node is brought into the electrically floating state, τ is a constant with a unit of time, and β is a constant greater than or equal to 0.4 and less than or equal to 0.6.
3 . The semiconductor device according to claim 1 , further comprising:
a third transistor, wherein one of a source and a drain of the third transistor is electrically connected to the one of the source and the drain of the second transistor.
4 . The semiconductor device according to claim 1 ,
wherein the τ follows the Arrhenius equation.
5 . The semiconductor device according to claim 1 ,
wherein an off-state current of the first transistor is obtained by measuring the change in the potential V FN over time.
6 . The semiconductor device according to claim 1 , wherein data is retained for 10 years or longer at 85° C.
7 . A semiconductor device comprising:
a memory cell; and an inverter, wherein the memory cell comprises:
a first transistor;
a second transistor; and
a capacitor,
wherein the first transistor comprises a stack of oxide semiconductor layers in a channel formation region, wherein a gate of the second transistor and a first terminal of the capacitor are electrically connected to a node, wherein one of a source and a drain of the second transistor is electrically connected to an input terminal of the inverter, wherein an output terminal of the inverter is electrically connected to an output terminal, wherein the node is configured to be supplied with a potential V 0 through the first transistor, wherein the node is configured to be brought into an electrically floating state by turning off the first transistor after the potential V 0 is supplied, wherein change in a potential V FN of the node with respect to time is expressed by Formula (1):
V
FN
(
t
)
=
V
0
×
e
-
(
t
τ
)
β
,
(
1
)
where t is elapsed time after the node is brought into the electrically floating state, τ is a constant with a unit of time, and β is a constant greater than or equal to 0.4 and less than or equal to 0.6, and
wherein the stack of the oxide semiconductor layers comprises a first oxide semiconductor layer, a second oxide semiconductor layer over the first oxide semiconductor layer, and a third oxide semiconductor layer over the second oxide semiconductor layer.
8 . The semiconductor device according to claim 7 , further comprising:
a third transistor, wherein one of a source and a drain of the third transistor is electrically connected to the one of the source and the drain of the second transistor.
9 . The semiconductor device according to claim 7 ,
wherein the τ follows the Arrhenius equation.
10 . The semiconductor device according to claim 7 ,
wherein an off-state current of the first transistor is obtained by measuring the change in the potential V FN over time.
11 . The semiconductor device according to claim 7 , wherein data is retained for 10 years or longer at 85° C.
12 . An electronic device comprising:
the semiconductor device according to claim 7 ; and at least one of a microphone, a speaker, a display portion, and an operation key.Join the waitlist — get patent alerts
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