US2017323907A1PendingUtilityA1

Semiconductor device and method for manufacturing same

Assignee: SHARP KKPriority: Nov 28, 2014Filed: Nov 19, 2015Published: Nov 9, 2017
Est. expiryNov 28, 2034(~8.4 yrs left)· nominal 20-yr term from priority
H10P 50/00H10P 14/40H10D 64/011H10W 46/301H10W 46/00H10W 20/4441H10W 20/4421H10W 20/48H10W 20/01H01L 2223/54426H01L 29/7869H01L 23/53257H01L 27/1248H01L 23/53228H01L 27/124H01L 29/66969H01L 23/544H01L 27/1225H10D 99/00H10D 86/451H10D 86/441H10D 30/6756H10D 30/6755H10D 30/6729H10D 86/423H10D 86/60G02F 1/1368G02F 1/1343
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Claims

Abstract

A semiconductor device ( 100 A) includes: a thin film transistor ( 101 ) including a gate electrode ( 3 ), an oxide semiconductor layer ( 5 ), a gate insulating layer ( 4 ), and a source electrode ( 7 S) and a drain electrode ( 7 D); an interlayer insulating layer ( 11 ) arranged so as to cover the thin film transistor ( 101 ) and to be in contact with a channel region ( 5 c ) of the thin film transistor ( 101 ); and a transparent conductive layer ( 19 ) arranged on the interlayer insulating layer ( 11 ), wherein: the source electrode ( 7 S) and the drain electrode ( 7 D) each include a copper layer ( 7 a ); a copper oxide film ( 8 ) is further provided between the source and drain electrodes and the interlayer insulating layer ( 11 ); the interlayer insulating layer ( 11 ) covers the drain electrode ( 7 D) with the copper oxide film ( 8 ) interposed therebetween; and in a contact hole (CH 1 ) formed in the interlayer insulating layer ( 11 ), the transparent conductive layer ( 19 ) is in direct contact with the copper layer ( 7 a ) of the drain electrode ( 7 D) without the copper oxide film ( 8 ) interposed therebetween.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising:
 a substrate;   a thin film transistor supported on the substrate, the thin film transistor including a gate electrode, an oxide semiconductor layer, a gate insulating layer formed between the gate electrode and the oxide semiconductor layer, and a source electrode and a drain electrode in contact with an upper surface of the oxide semiconductor layer;   an interlayer insulating layer arranged so as to cover the thin film transistor and to be in contact with a channel region of the thin film transistor; and   a transparent conductive layer arranged on the interlayer insulating layer, wherein:   the source electrode and the drain electrode each include a copper layer;   a copper oxide film is further provided between the source and drain electrodes and the interlayer insulating layer;   the interlayer insulating layer covers the drain electrode with the copper oxide film interposed therebetween; and   in a first contact hole formed in the interlayer insulating layer, the transparent conductive layer is in direct contact with the copper layer of the drain electrode without the copper oxide film interposed therebetween.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein:
 the copper oxide film is in contact with the copper layer in the source electrode and the drain electrode; and   an interface between the copper layer and the transparent conductive layer is flatter than an interface between the copper layer and the interlayer insulating layer.   
     
     
         3 . The semiconductor device according to  claim 1 , wherein in the first contact hole, an edge portion of the copper oxide film is located on an outer side with respect to an edge portion of the interlayer insulating layer as seen from a direction normal to a surface of the substrate. 
     
     
         4 . The semiconductor device according to  claim 1 , wherein a thickness of the copper oxide film is 10 nm or more and 70 nm or less. 
     
     
         5 . The semiconductor device according to  claim 1 , wherein the copper oxide film is an oxide film formed by exposing a surface of the copper layer to an oxidation treatment. 
     
     
         6 . The semiconductor device according to  claim 1 , wherein each of the source electrode and the drain electrode further includes a lower layer which is arranged on the substrate side of the copper layer and in contact with the oxide semiconductor layer, the lower layer including titanium or molybdenum. 
     
     
         7 . The semiconductor device according to  claim 1 , further comprising a terminal portion formed on the substrate, the terminal portion including:
 a source connection layer formed from the same conductive film as the source electrode and the drain electrode;   the interlayer insulating layer provided extending over the source line; and   an upper conductive layer formed from the same transparent conductive film as the transparent conductive layer, wherein:   a portion of an upper surface of the source connection layer is covered by the copper oxide film;   the interlayer insulating layer covers the source connection layer with the copper oxide film interposed therebetween; and   in a second contact hole formed in the interlayer insulating layer, the upper conductive layer is in direct contact with the source connection layer without the copper oxide film interposed therebetween.   
     
     
         8 . The semiconductor device according to  claim 1 , further comprising an alignment mark portion having a mark layer formed from the same conductive film as the source electrode and the drain electrode, wherein:
 a portion of an upper surface of the mark layer is covered by the copper oxide film;   the interlayer insulating layer is in contact with the portion of the upper surface of the mark layer with the copper oxide film interposed therebetween and has an opening over the mark layer; and   the copper oxide film is not arranged on a portion of the upper surface of the mark layer that overlaps with the opening as seen from a direction normal to the substrate.   
     
     
         9 . The semiconductor device according to  claim 1 , wherein the thin film transistor has a channel-etched structure. 
     
     
         10 . The semiconductor device according to  claim 1 , wherein the oxide semiconductor layer includes an In—Ga—Zn—O-based semiconductor. 
     
     
         11 . The semiconductor device according to  claim 10 , wherein the oxide semiconductor layer includes a crystalline portion. 
     
     
         12 . A method for manufacturing a semiconductor device, the method comprising:
 a step (A) of forming a thin film transistor by forming, on a substrate, a gate electrode, a gate insulating layer, an oxide semiconductor layer, and a source electrode and a drain electrode including a copper layer;   an oxidation treatment step (B) of performing an oxidation treatment on at least a channel region of the oxide semiconductor layer, thereby increasing an oxygen concentration of a surface of the at least one portion to be the channel region and oxidizing a surface of the source electrode and the drain electrode to form a copper oxide film;   a step (C) of forming an interlayer insulating layer so as to cover the thin film transistor and to be in contact with the channel region;   a contact hole formation step (D) of forming a first contact hole in a portion of the interlayer insulating layer that is located over the drain electrode, thereby exposing the copper oxide film;   a step (E) of removing a portion of the copper oxide film that is exposed through the first contact hole using a chelate cleaning method, thereby exposing the copper layer; and   a step (F) of forming a transparent conductive layer so that the transparent conductive layer is in direct contact with the copper layer exposed in the first contact hole.   
     
     
         13 . The method for manufacturing a semiconductor device according to  claim 12 , wherein the thin film transistor has a channel-etched structure. 
     
     
         14 . The method for manufacturing a semiconductor device according to  claim 12 , wherein the oxide semiconductor layer includes an In—Ga—Zn—O-based semiconductor. 
     
     
         15 . The method for manufacturing a semiconductor device according to claim  14 , wherein the oxide semiconductor layer includes a crystalline portion.

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