Semiconductor device and method for manufacturing the same

Abstract

In an SOP1 having a semiconductor chip and another semiconductor chip, in wire coupling between the chips, a withstand voltage can be secured by setting an inter-wire distance between a wire in a first wire group that is closest to a second wire group and a wire in the second wire group that is closest to the first wire group to be larger than an inter-wire distance between any wires in the first wire group and the second wire group, which makes it possible to attain improvement of reliability of the SOP1.

1 - 18 . (canceled) 
     
     
         19 . A method for manufacturing a semiconductor device, comprising:
 a) preparing a lead frame that includes a first chip mounting part supported by a first suspension lead, a second chip mounting part supported by a second suspension lead, a plurality of first leads that are arranged adjacent to the first chip mounting part, and a plurality of second leads that are arranged adjacent to the second chip mounting part;   b) mounting a first semiconductor chip over the first chip mounting part and mounting a second semiconductor chip over the second chip mounting part;   c) electrically coupling some of a plurality of pads of the first semiconductor chip and some of a plurality of pads of the second semiconductor chip with a plurality of wires, respectively;   d) electrically coupling some of the pads of the first semiconductor chip and the first leads with a plurality of wires, respectively;   e) electrically coupling some of the pads of the second semiconductor chip and the second leads with a plurality of wires, respectively;   f) forming a sealing body that seals the first and second semiconductor chips, parts of the first and second suspension leads, the first and second chip mounting parts, parts of the first leads and the second leads, and a plurality of wires, and has a first side extending in a first direction and a second side extending in a second direction that is a direction substantially perpendicular to the first direction; and   g) cutting off the first and second suspension leads and the first and second leads from the lead frame,   wherein in the first semiconductor chip, a plurality of first pads and a plurality of second pads are arranged over its surface,   wherein in the second semiconductor chip, a plurality of third pads and a plurality of fourth pads are arranged over its surface,   wherein c) includes:   c1) coupling the first pads of the first semiconductor chip and the fourth pads of the second semiconductor chip with a plurality of first wires included in a first wire group, respectively; and   c2) coupling the second pads of the first semiconductor chip and the third pads of the second semiconductor chip with a plurality of second wires included in a second wire group, respectively, and   wherein both in plan view and in the first direction, c1) and c2) are performed so that an inter-wire distance between a wire that is closest to the second wire group in the first wire group and a wire that is closet to the first wire group in the second wire group is larger than any inter-wire distances in the first wire group and in the second wire group.   
     
     
         20 . A method for manufacturing a semiconductor device according to  claim 19 ,
 wherein c1) includes:   c11) forming a first stud bump over one pad among the first pads;   c12) coupling one end of a wire onto one pad among the fourth pads after c11); and   c13) coupling the other end of the wire onto the first stud bump after c12).   
     
     
         21 . A method for manufacturing a semiconductor device, comprising:
 a) preparing a lead frame that has a first chip mounting part supported by a first suspension lead, a second chip mounting part supported by a second suspension lead, multiple first leads arranged adjacent to the first chip mounting part, and multiple second leads arranged adjacent to the second chip mounting part;   b) mounting a first semiconductor chip over the first chip mounting part and mounting a second semiconductor chip over the second chip mounting part;   c) electrically coupling some of multiple pads of the first semiconductor chip and some of multiple pads of the second semiconductor chip with multiple wires, respectively;   d) electrically coupling some of the multiple pads of the first semiconductor chip and the multiple first leads with multiple wires, respectively;   e) electrically coupling some of the multiple pads of the second semiconductor chip and the multiple second leads with multiple wires, respectively;   f) sealing the first and second semiconductor chips, parts of the first and second suspension leads, the first and second chip mounting parts, parts of the multiple first and multiple second leads, and multiple wires to form a sealing body that includes a first side extending in a first direction and a second side extending in a second direction substantially perpendicular to the first direction; and   g) cutting off the first and second suspension leads and the multiple first and multiple second leads from the lead frame, in which in the first semiconductor chip, multiple first pads and multiple second pads are arranged over its surface, and in the second semiconductor chip, multiple third pads and multiple fourth pads are arranged over its surface,   wherein c) includes:   c1) coupling the multiple first pads of the first semiconductor chip and the multiple fourth pads of the second semiconductor chip with multiple first wires included in a first wire group, respectively; and   c2) coupling the multiple second pads of the first semiconductor chip and the multiple third pads of the second semiconductor chip with multiple second wires included in a second wire group, respectively,   wherein c1) and c2) are performed so that an inter-wire distance between a wire that is closest to the second wire group in the first wire group and a wire that is closest to the first wire group in the second wire group is larger than any inter-wire distances in the first wire group and the second wire group.   
     
     
         22 . The method for manufacturing a semiconductor device according to  claim 21 ,
 wherein c1) includes:   c11) forming a first stud bump over one pad among the multiple first pads;   c12) coupling one end of a wire onto one pad among the multiple fourth pads after c11); and   c13) coupling the other end of the wire onto the first stud bump after c12).   
     
     
         23 . The method for manufacturing a semiconductor device according to  claim 22 ,
 wherein c2) includes:   c21) forming a second stud bump over one pad among the multiple third pads;   c22) coupling one end of a wire onto one pad among the multiple second pads after c21); and   c23) coupling the other end of the wire onto the second stud bump after c22).   
     
     
         24 . The method for manufacturing a semiconductor device according to  claim 21 ,
 wherein each of the first and second chip mounting parts have a first end and a second end that faces the first end in the first direction, respectively,   wherein the first and second suspension leads are coupled to the first ends of the first and second chip mounting parts, respectively, and   wherein c) to e) are performed with the respective second ends of the first and second chip mounting parts pressed down by a clamper.   
     
     
         25 . The method for manufacturing a semiconductor device according to  claim 24 ,
 wherein the second ends of the first and second chip mounting parts are made to be open ends.   
     
     
         26 . The method for manufacturing a semiconductor device according to  claim 25 , comprising:
 electrically coupling some of multiple pads of the first semiconductor chip and the first suspension lead with wires; and   electrically coupling some of multiple pads of the second semiconductor chip and the second suspension lead with wires.   
     
     
         27 . The method for manufacturing a semiconductor device according to  claim 25 ,
 wherein the sealing body has the second side that intersects the first side and extends in the second direction and a fourth side that faces the second side and extends in the second direction,   wherein the first and second suspension leads are provided so as to be closer to the second side than the fourth side, and   wherein in f), an insulating resin is made to flow from the second side toward the fourth side to form the sealing body.   
     
     
         28 . The method for manufacturing a semiconductor device according to  claim 27 ,
 wherein f) includes:   f1) preparing a first mold having a first cavity and a second mold facing the first mold;   f2) positioning the lead frame so that the first and second semiconductor chips are positioned inside the first cavity of the first mold;   f3) holding the lead frame with the first mold and the second mold; and   f4) flowing the insulating resin into the first cavity from a gate linking to the first cavity.   
     
     
         29 . The method for manufacturing a semiconductor device according to  claim 24 ,
 wherein c) to e) are performed with an ultrasonic wave applied to each of the multiple wires through bonding tools.   
     
     
         30 . The method for manufacturing a semiconductor device according to  claim 21 ,
 wherein the first and second semiconductor chips are portions of the same semiconductor chip, and   wherein in b), the second semiconductor chip is mounted over the second chip mounting part so as to be rotated to the mounting direction of the first semiconductor chip by 180 degrees.   
     
     
         31 . The method for manufacturing a semiconductor device according to  claim 23 ,
 wherein an insulating layer is arranged both under a pad over which the first stud bump is formed among the multiple first pads and under a pad over which the second stud bump is formed among the multiple third pads.   
     
     
         32 . The method for manufacturing a semiconductor device according to  claim 31 , wherein the insulating layer contains a layer comprised of a polyimide. 
     
     
         33 . The method for manufacturing a semiconductor device according to  claim 28 ,
 wherein a depth of the first cavity is a depth so that distances from the wire peaks of respective wires of the first and second wire groups to the upper surface of the sealing body are equal to or more than a chip thickness of the first semiconductor chip in cross-sectional view.