Transistor substrate and display device manufactured from the transistor substrate

Abstract

A transistor substrate is provided. The transistor substrate includes a plurality of data lines and a plurality of scan lines, wherein the scan lines intersects with the data lines to define a plurality of pixel units. One of the pixel units includes a first electrode having a slit substantially parallel to the data lines. The pixel units include a second electrode and a switching transistor. The switching transistor includes a gate electrode connecting to one of the scan lines. The gate electrode has a first edge substantially parallel to the extending direction of the scan lines. The switching transistor includes a drain electrode electrically connected to one of the first electrode and the second electrode. The drain electrode includes an extending portion which extends toward the slit and extends away from an extending line of the first edge. The drain electrode and the slit have an overlapping region.

What is claimed is: 
     
         1 . A transistor substrate, comprising:
 a plurality of data lines; and   a plurality of scan lines intersecting with the plurality of data lines to define a plurality of pixel units, wherein one of the plurality of pixel units comprises:
 a first electrode having a slit, wherein the slit is substantially parallel to the plurality of data lines; 
 a second electrode, wherein one of the first electrode and the second electrode is used for receiving a pixel voltage signal, and wherein the other of the first electrode and the second electrode is used for receiving a common voltage signal; and 
 a switching transistor, comprising:
 a gate electrode connecting to one of the plurality of scan lines and including a first edge substantially parallel to an extending direction of the plurality of scan lines; and 
 a drain electrode electrically connected to one of the first electrode and the second electrode, and including an extending portion, wherein the extending portion extends toward the slit and extends away from an extending line of the first edge, and wherein the drain electrode and the slit have an overlapping region. 
 
   
     
     
         2 . The transistor substrate as claimed in  claim 1 , wherein the extending portion comprises a second edge substantially parallel to the first edge, and at least a portion of the second edge is located within the overlapping region, wherein a minimum distance between the first edge and the second edge is greater than 0 μm and is smaller than 8.2 μm. 
     
     
         3 . The transistor substrate as claimed in  claim 2 , wherein the minimum distance between the first edge and the second edge is greater than 3.4 μm and is smaller than 7.6 μm. 
     
     
         4 . The transistor substrate as claimed in  claim 1 , wherein the slit comprises a curved portion, and wherein the overlapping region is located within the curved portion. 
     
     
         5 . The transistor substrate as claimed in  claim 4 , wherein the slit further comprises a major axis portion connecting to the curved portion, and wherein an absolute value of a slope of an edge of the major axis portion is different from a slope of an edge of the curved portion using the extending direction of the plurality of scan lines as a basis. 
     
     
         6 . The transistor substrate as claimed in  claim 4 , wherein a length of the curved portion along a direction that is perpendicular to the extending direction of the plurality of scan lines is from 2 μm to 4 μm. 
     
     
         7 . The transistor substrate as claimed in  claim 4 , wherein a distance between an end of the curved portion and the first edge of the gate electrode along the direction that is perpendicular to the extending direction of the plurality of scan lines is from 3 μm to 5 μm. 
     
     
         8 . The transistor substrate as claimed in  claim 1 , wherein a minimum width of the extending portion of the drain electrode is greater than a maximum width of the slit. 
     
     
         9 . A display device, comprising
 a transistor substrate comprising:
 a plurality of data lines; and 
 a plurality of scan lines intersecting with the plurality of data lines to define a plurality of pixel units, wherein one of the plurality of pixel units comprises: 
 a first electrode having a slit, wherein the slit is substantially parallel to the plurality of data lines; 
 a second electrode, wherein one of the first electrode and the second electrode is used for receiving a pixel voltage signal, and wherein the other of the first electrode and the second electrode is used for receiving a common voltage signal; and 
 a switching transistor, comprising:
 a gate electrode connecting to one of the plurality of scan lines and including a first edge substantially parallel to an extending direction of the plurality of scan lines; and 
 a drain electrode electrically connected to one of the first electrode and the second electrode, and including an extending portion, wherein the extending portion extends toward the slit and extends away from an extending line of the first edge, and wherein the drain electrode and the slit have an overlapping region; 
 
   an opposing substrate disposed opposite to the transistor substrate; and   a display medium disposed between the transistor substrate and the opposing substrate.   
     
     
         10 . The display device as claimed in  claim 9 , wherein the opposing substrate comprises a light-shielding layer, wherein the light-shielding layer defines a pixel aperture region, and a portion of the extending portion of the drain electrode is located within the pixel aperture region. 
     
     
         11 . A display device, comprising
 a transistor substrate comprising:
 a plurality of data lines; and 
 a plurality of scan lines intersecting with the plurality of data lines, 
   wherein two adjacent scan lines and two adjacent data lines define a pixel unit,   wherein the pixel unit comprises:
 a first electrode having a slit, wherein the slit comprises a curved portion; 
 a second electrode disposed corresponding to the first electrode; and 
 a switching transistor, comprising:
 a gate electrode electrically connected to one of the plurality of scan lines, wherein the gate electrode includes a first edge substantially parallel to an extending direction of the plurality of scan lines, and the first edge is adjacent to the slit; and 
 a drain electrode electrically connected to the first electrode and one of the plurality of the data lines, wherein the drain electrode includes an extending portion, the extending portion extends away from an extending line of the first edge, and the extending portion at least partially overlaps the slit, 
 
   wherein the first electrode receives a pixel voltage signal via the drain electrode, and the second electrode receives a common voltage signal;   an opposing substrate disposed opposite to the transistor substrate; and   a display medium disposed between the transistor substrate and the opposing substrate.