Memory device and electronic apparatus including the same

Abstract

The inventive concept provides a memory device, in which memory cells are arranged to have a low variation in electrical characteristics and thereby enhanced reliability, an electronic apparatus including the memory device, and a method of manufacturing the memory device. In the memory device, memory cells at different levels may be covered with spacers having different thicknesses, and this may control resistance characteristics (e.g., set resistance) of the memory cells and to reduce a vertical variation in electrical characteristics of the memory cells. Furthermore, by adjusting the thicknesses of the spacers, a sensing margin of the memory cells may increase.

What is claimed is: 
     
         1 . A method of manufacturing a memory device, the method comprising:
 forming a first electrode line layer on a substrate, the first electrode line layer including a plurality of first electrode lines extending in a first direction and spaced apart from each other in a second direction different from the first direction;   forming a first memory cell layer on the first electrode line layer, the first memory cell including a plurality of first memory cells, of which each includes a first lower electrode, a first selection device, a first intermediate electrode, a first heating electrode, and a first variable resistance pattern sequentially stacked, the plurality of first memory cells electrically connected to the plurality of first electrode lines and spaced apart from each other in the first and second directions;   forming a first inner spacer on side surfaces of the first lower electrode and the first selection device for each of the plurality of first memory cells;   forming a first spacer on side surfaces of the first inner spacer, the first immediate electrode, the first heating electrode, and the first variable resistance pattern for each of the plurality of first memory cells;   forming a second electrode line layer on the first memory cell layer, the second electrode line layer including a plurality of second electrode lines extending in the second direction, spaced apart from each other in the first direction, and electrically connected to the plurality of first memory cells;   forming a second memory cell layer on the second electrode line layer, the second memory cell including a plurality of second memory cells, of which each includes a second lower electrode, a second selection device, a second intermediate electrode, a second heating electrode, and a second variable resistance pattern sequentially stacked, the plurality of second memory cells electrically connected to the plurality of second electrode lines and spaced apart from each other in the first and second directions;   forming a second inner spacer on side surfaces of the second lower electrode and the second selection device for each of the plurality of second memory cells;   forming a second spacer on at least side surfaces of the second immediate electrode, the second heating electrode, and the second variable resistance pattern for each of the plurality of second memory cells; and   forming a third electrode line layer on the second memory cell layer, the third electrode line layer including a plurality of third electrode lines extending in the first direction, spaced apart from each other in the second direction, and electrically connected to the plurality of second memory cells,   wherein the first spacer has a thickness different from that of the second spacer.   
     
     
         2 . The method of  claim 1 , wherein the thickness of each of the first and second spacers is a thickness measured in a direction normal to a side surface of each of the first and second variable resistance patterns respectively, and
 the thickness of the first or second spacer is adjusted so that the first and second memory cells have substantially the same resistance.   
     
     
         3 . The method of  claim 1 , wherein one of the first and second spacers comprises a material exerting a compressive stress on the corresponding first or second variable resistance pattern, and
 the other of the first and second spacers comprises a material exerting a tensile stress on the corresponding first or second variable resistance pattern.