Semiconductor memory device and method for manufacturing same
Abstract
According to one embodiment, a method for manufacturing a semiconductor memory device includes forming a stacked body by alternately stacking an insulating film and a conductive film. The method includes forming a trench in the stacked body. The trench extends in one direction and divides the conductive film. The method includes burying a diblock copolymer in the trench. The method includes phase-separating the diblock copolymer into a plurality of first blocks and an insulative second block extending in a stacking direction of the insulating film and the conductive film. The method includes forming a plurality of holes by removing the first blocks. The method includes forming charge accumulation layers on inner surfaces of the holes. And, the method includes forming a plurality of semiconductor pillars extending in the stacking direction by burying a semiconductor material in the holes.
Claims
exact text as granted — not AI-modified1 . (canceled)
2 . A method for manufacturing a semiconductor memory device, comprising:
forming a stacked body by alternately stacking a plurality of first films and a plurality of second films; forming a trench in the stacked body, the trench extending in a first direction and the stacked body being divided in a second direction at both sides of the trench, the second direction intersecting with the first direction and a stacking direction of the first films and the second films; burying an insulating member in the trench; forming a plurality of holes by removing selectively the insulating member, the plurality of holes being spaced from each other in the first direction; and forming a plurality of semiconductor pillars extending in the stacking direction in the plurality of holes.
3 . The method according to claim 2 , further comprising setting back side surfaces of the holes by etching after forming the holes.
4 . The method according to claim 2 , wherein one of the plurality of semiconductor pillars is formed in one of the holes via a charge accumulation layer.
5 . The method according to claim 2 , wherein one of the plurality of semiconductor pillars is formed in one of the holes via a block layer, a charge accumulation layer and a tunnel layer.
6 . The method according to claim 2 , wherein
a length of the trench in the first direction is made longer than length of the trench in the second direction, and a length of the trench in the stacking direction is made longer than the length of the trench in the first direction.
7 . The method according to claim 2 , further comprising dividing the stacked body in the second direction at a position differing from the trench.
8 . A method for manufacturing a semiconductor memory device, the device including
a stacked body including a plurality of insulating portions and a plurality of conductive films, each of the plurality of insulating portions and each of the plurality of conductive films being alternately stacked, a trench being formed in the stacked body, the trench extending in a first direction, and each of the conductive films being divided in a second direction at both sides of the trench, the second direction intersecting with the first direction and a stacking direction of the insulating portions and the conductive films, a plurality of semiconductor pillars provided in the trench and extending in the stacking direction, a plurality of insulating layers provided around the semiconductor pillars, and an insulating member provided between the insulating layers in the trench; a pair of memory transistors being provided so as to correspond to regions of each of the semiconductor pillars, the regions facing a pair of side surfaces of the trench, the side surfaces extending along the first direction, the pair of memory transistors being disposed at an intersection between one of the semiconductor pillars and one of the conductive films, the method comprising: forming the stacked body by alternately stacking a plurality of first films and a plurality of second films; forming the trench in the stacked body; burying the insulating member in the trench; forming a plurality of holes by removing selectively the insulating member, the plurality of holes being spaced from each other in the first direction; and forming the plurality of semiconductor pillars extending in the stacking direction in the plurality of holes.
9 . The method according to claim 8 , further comprising setting back side surfaces of the holes by etching after forming the holes.
10 . The method according to claim 8 , wherein one of the plurality of semiconductor pillars is formed in one of the holes via a charge accumulation layer.
11 . The method according to claim 8 , wherein one of the plurality of semiconductor pillars is formed in one of the holes via a block layer, a charge accumulation layer and a tunnel layer.
12 . The method according to claim 8 , wherein
a length of the trench in the first direction is made longer than length of the trench in the second direction, and a length of the trench in the stacking direction is made longer than the length of the trench in the first direction.
13 . The method according to claim 8 , further comprising dividing the stacked body in the second direction at a position differing from the trench.
14 . A method for manufacturing a semiconductor memory device, comprising:
forming a stacked body by alternately stacking a plurality of first films and a plurality of second films; forming a first trench in the stacked body, the first trench extending in a first direction; burying an insulating member in the first trench; forming a plurality of holes by removing selectively the insulating member, the plurality of holes being spaced from each other in the first direction; forming a plurality of semiconductor pillars in the plurality of holes, the plurality of semiconductor pillars extending in a stacking direction of the first films and the second films; dividing the stacked body in a second direction by a second trench differing from the first trench, the second direction intersecting with the first direction and the stacking direction.
15 . The method according to claim 14 , wherein one of the plurality of semiconductor pillars is formed in one of the holes via a charge accumulation layer.
16 . The method according to claim 14 , wherein one of the plurality of semiconductor pillars is formed in one of the holes via a block layer, a charge accumulation layer and a tunnel layer.
17 . The method according to claim 14 , wherein
a length of the first trench in the first direction is made longer than length of the first trench in the second direction, and a length of the first trench in the stacking direction is made longer than the length of the first trench in the first direction.Join the waitlist — get patent alerts
Track US2017301691A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.