Fabrication method of semiconductor substrate
Abstract
A semiconductor substrate is disclosed. The semiconductor substrate includes a substrate body having at least an opening formed on a surface thereof, wherein the surface of the substrate body and a wall of the opening are made of an insulating material; and a circuit layer formed on the surface of the substrate body, wherein the circuit layer covers an end of the opening and is electrically insulated from the opening. The opening facilitates to increase the thickness of the insulating structure between the circuit layer and the substrate body of a silicon material to prevent signal degradation when high frequency signals are applied to the circuit layer.
Claims
exact text as granted — not AI-modified1 - 9 . (canceled)
10 . A fabrication method of a semiconductor substrate, comprising the steps of:
providing a substrate body having at least an opening formed on a surface thereof, wherein the surface of the substrate body and a wall of the opening are made of an insulating material; and forming a circuit layer on the surface of the substrate body, wherein the circuit layer covers an end of the opening and is electrically insulated from the opening.
11 . The method of claim 10 , wherein the substrate body is a silicon-containing substrate.
12 . The method of claim 10 , wherein the substrate body further has a conductive through hole formed therein and electrically connected to the circuit layer.
13 . The method of claim 10 , further comprising heating the substrate body in an oxygen environment so as to form silicon dioxide as the insulating material.
14 . The method of claim 10 , wherein the opening is of a hollow shape.
15 . The method of claim 10 , further comprising before forming the circuit layer, filling the opening of the substrate body with an insulating material.
16 . The method of claim 10 , further comprising forming a redistribution layer (RDL) structure on the surface of the substrate body and the circuit layer, wherein the RDL structure is electrically connected to the circuit layer.
17 . The method of claim 16 , wherein the substrate body further has at least a conductive through hole formed therein and electrically connected to the RDL structure.
18 . The method of claim 16 , further comprising forming a plurality of conductive elements on the RDL structure.Join the waitlist — get patent alerts
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