US2017254851A1PendingUtilityA1

Physically aware scan diagnostic logic and power saving circuit insertion

Assignee: IBMPriority: Mar 1, 2016Filed: Mar 1, 2016Published: Sep 7, 2017
Est. expiryMar 1, 2036(~9.6 yrs left)· nominal 20-yr term from priority
G01R 31/31704G01R 31/3177G06F 30/39G01R 31/31723G06F 30/327G01R 31/31721G01R 31/318541G01R 31/318538G06F 17/5068
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Claims

Abstract

Aspects include a computer-implemented method for scan diagnostic logic circuit insertion in a circuit design topology. A method includes evaluating a scan chain of the circuit design topology, the scan chain comprising a plurality of scan latches and a plurality of physical structures, the evaluating including identifying the plurality of physical structures in the scan chain. The method also includes identifying one of the plurality of physical structures as a physical structure of interest, and responsive to the identification of the physical structure of interest, targeting the physical structure of interest, the targeting comprising inserting scan diagnostic logic at a location in the scan chain that is based on a location of the physical structure of interest in the scan chain.

Claims

exact text as granted — not AI-modified
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         9 . A computer program product for performing scan diagnostic logic insertion in a circuit design topology, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor located on a device to cause the computer processor to perform:
 evaluating a scan chain of the circuit design topology, the scan chain comprising a plurality of scan latches and a plurality of physical structures, the evaluating including identifying the plurality of physical structures in the scan chain;   identifying one of the plurality of physical structures as a physical structure of interest; and   responsive to the identification of the physical structure of interest, targeting the physical structure of interest, the targeting comprising inserting scan diagnostic logic at a location in the scan chain that is based on a location of the physical structure of interest in the scan chain.   
     
     
         10 . The computer readable medium of  claim 9 , wherein the physical structure of interest is at least one of a scan path, a long scan net, a metal layer, and a specific latch type. 
     
     
         11 . The computer readable medium of  claim 9 , the scan diagnostic logic is inserted at a location that is upstream from the physical structure of interest. 
     
     
         12 . The computer readable medium of  claim 9 , further comprising isolating the physical structure of interest, the isolating comprising inserting additional scan diagnostic logic at a location in the scan chain that is downstream from the physical structure of interest. 
     
     
         13 . The computer readable medium of  claim 12 , wherein the scan diagnostic logic at a location in the scan chain that is upstream from the physical structure of interest and the location in the scan chain that is downstream from the physical structure of interest is immediately after a downstream scan latch, wherein the downstream scan latch is one of the plurality of scan latches. 
     
     
         14 . The computer readable medium of  claim 9 , further comprising:
 controlling the scan diagnostic logic by applying a global signal to the scan insertion logic to prevent switching of the physical structure of interest during functional operation.   
     
     
         15 . The computer readable medium of  claim 9 , wherein the physical structure of interest is identified based on a design metric. 
     
     
         16 . The computer readable medium of  claim 9 , further comprising, inserting further scan diagnostic logic at a desired segment size resolution subsequent to the targeting of the physical structure of interest, wherein the segment size resolution is based on a number of scan latches. 
     
     
         17 . A system for scan diagnostic logic insertion in a circuit design topology, the system comprising:
 a memory having computer readable instructions;   a processor for executing the computer readable instructions, the computer readable instructions comprising:   evaluate a scan chain of the circuit design topology, the scan chain comprising a plurality of scan latches and a plurality of physical structures, the evaluating including identifying the plurality of physical structures in the scan chain;   identify one of the plurality of physical structures as a physical structure of interest, the physical structure of interest comprising at least one of a scan path, a long scan net, a metal layer, or a specific latch type; and   responsive to the identification of the physical structure of interest, target the physical structure of interest, the targeting comprising inserting scan diagnostic logic at a location in the scan chain that is based on a location of the physical structure of interest in the scan chain.   
     
     
         18 . The system of  claim 17 , the scan diagnostic logic is inserted at a location in the scan chain that is upstream from the physical structure of interest. 
     
     
         19 . The system of  claim 17 , wherein the scan diagnostic logic is inserted at a location in the scan chain that is upstream from the physical structure of interest and the location in the scan chain that is downstream from the physical structure of interest is immediately after a downstream scan latch, wherein the downstream scan latch is one of the plurality of scan latches. 
     
     
         20 . The computer readable medium of  claim 17 , further comprising, inserting further scan diagnostic logic at a segment size resolution subsequent to the targeting of the physical structure of interest, wherein the segment size resolution is based on a number of scan latches.

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