Transfer switch with arc suppression

Abstract

An automatic transfer switch for a power system receiving multiple alternating current sources and delivering multiple alternating current output is described. A transfer switch control circuit can sense a power loss in one or both AC sources. Each power supply can deliver current to drive a load but, if one of the power supplies fails, the other can supply power to drive both loads.

I/We claim: 
     
         1 . A method, comprising:
 supplying a first power outlet with power from a first power input;   supplying a second power outlet with power from a second power input;   monitoring the first power input; and upon an interruption of the first power input: connecting the second power input to the first power outlet; and   disconnecting the first power input from the first power outlet.   
     
     
         2 . The method of  claim 1 , further comprising, upon restoration of the first power input, connecting the first power outlet to the first power source and disconnecting the first power outlet from the second power source. 
     
     
         3 . The method of  claim 1 , wherein connecting the second power input to the first power outlet and disconnecting the first power input from the first power outlet comprises: moving a first relay from a first position where a neutral component of the first power input is connected to a neutral component of the first power outlet to a second position where a neutral component of the second power input is connected to the neutral component of the first power outlet; and moving a second relay from a first position where a line component of the first power input is connected to a line component of the first power outlet to a second position where a line component of the second power input is connected to the line component of the first power outlet. 
     
     
         4 . The method of  claim 1 , further comprising:
 monitoring the second power source; and   upon interruption of the second power source: connecting the first power input to the second power outlet; and disconnecting the second power input from the second power outlet.   
     
     
         5 . The method of  claim 4 , wherein connecting the first power input to the second power outlet and disconnecting the second power input from the second power outlet comprises: moving a first relay from a first position where a neutral component of the second power input is connected to a neutral component of the second power outlet to a second position where a neutral component of the first power input is connected to the neutral component of the second power outlet; and
 moving a second relay from a first position where a line component of the second power input is connected to a line component of the second power outlet to a second position where a line component of the first power input is connected to the line component of the second power outlet.   
     
     
         6 . An automatic transfer switch, comprising:
 a first power feed coupled with the automatic transfer switch and connected to a first power source;   a second power feed coupled with the automatic transfer switch and connected to a second power source;   a first power outlet on the automatic transfer switch initially configured to receive power from the first power source;   a second power outlet on the automatic transfer switch initially configured to receive power from the second power source; and   transfer means for switching power to the first power outlet from the first power feed to the second power feed upon interruption of the first power source.   
     
     
         7 . The automatic transfer switch of  claim 6 , wherein the transfer means for switching power to the first power outlet comprises a first switching circuit for the first power outlet, the first switching circuit comprising: a neutral switching means for switching a neutral power component connection with the first power outlet between a first neutral connection associated with the first power feed and a second neutral connection associated with the second power feed; and a line switching means for switching a line power component connection with the first power outlet between a first line connection associated with the first power feed and a second line connection associated with the second power feed. 
     
     
         8 . The automatic transfer switch of  claim 7 , wherein the neutral switching means and line switching means comprise relays. 
     
     
         9 . The automatic transfer switch of  claim 6 , further comprising transfer means for switching power to the second power outlet from the second power feed to the first power feed upon interruption of the second power source. 
     
     
         10 . The automatic transfer switch of  claim 9 , wherein the transfer means for switching power to the second power outlet comprises a second switching circuit for the second power outlet, the second switching circuit comprising:
 a neutral switching means for switching a neutral power component connection with the second power outlet between a first neutral connection associated with the second power feed and a second neutral connection associated with the first power feed; and   a line switching means for switching a line power component connection with the second power outlet between a first line connection associated with the second power feed and a second line connection associated with the first power feed.   
     
     
         11 . The automatic transfer switch of  claim 10 , wherein the neutral switching means and line switching means comprise relays. 
     
     
         12 . The automatic transfer switch of  claim 9 , further comprising a first indicator in communication with the first power feed, wherein the first indicator is adapted to identify an interruption of the first power source. 
     
     
         13 . The automatic transfer switch of  claim 12 , further comprising a second indicator in communication with the second power feed, wherein the second indicator is adapted to identify an interruption of the second power source. 
     
     
         14 . An arc suppression circuit, comprising:
 a microprocessor;   a first solid state switch, wherein the microprocessor is in switch control communication with the first solid state switch;   a first power source connection connectable to a first power supply, the first power source connection in power supply communication with the first solid state switch;   a second solid state switch, wherein the microprocessor is in switch control communication with the second solid state switch;   a second power source connection connectable to a second power supply, the second power source connection in power supply communication with the second solid state switch; and   a first switching device electrically coupled with the first and second solid state switches, the first switching device connectable to a first electrical load.   
     
     
         15 . The arc suppression circuit of  claim 14 , wherein the first and second solid state switches are triacs. 
     
     
         16 . The arc suppression circuit of  claim 14 , wherein the first switching device is a relay switch. 
     
     
         17 . The arc suppression circuit of  claim 14 , furthering comprising:
 a third solid state switch, wherein the microprocessor is in switch control communication with the third solid state switch;   a fourth solid state switch, wherein the microprocessor is in switch control communication with the fourth solid state switch; and   a second switching device electrically coupled with the third and fourth solid state switches, the second switching device connectable to a second electrical load.   
     
     
         18 . The arc suppression circuit of  claim 17 , wherein the third and fourth solid state switches are triacs. 
     
     
         19 . The arc suppression circuit of  claim 17 , wherein the second switching device is a relay switch. 
     
     
         20 . An arc suppression circuit, comprising:
 a first power input configured to receive power from a first power source;   a second power input configured to receive power from a second power source;   a first relay switch; a first solid state switch electrically connected to the first power input, wherein the first solid state switch is initially configured to provide the power received by the first power input to the first relay switch; and   a second solid state switch electrically coupled with the second power input and the first relay switch.   
     
     
         21 . The arc suppression circuit of  claim 20 , further comprising a first electrical load initially configured to receive power from the first power source through the first solid state switch and through the first relay switch. 
     
     
         22 . The arc suppression circuit of  claim 21 , further comprising a microprocessor to control the first and second solid state switches and the first relay switch. 
     
     
         23 . The arc suppression circuit of  claim 21 , wherein in response to an interruption of power from the first power source to the first power input:
 the microprocessor causes the first solid state switch to de-energize;   the microprocessor causes the first relay switch to switch from a first position to a second position; and   the microprocessor causes the second solid state switch to energize, thereby allowing the second solid state switch to provide the power received by the second power input to the first relay switch.   
     
     
         24 . The arc suppression circuit of  claim 21 , further comprising:
 a second relay switch;   a third solid state switch electrically connected to the second power input, wherein the third solid state switch is initially configured to provide the power received by the second power input to the second relay switch;   a fourth solid state switch electrically coupled with the first power input and the second relay switch; and   a second electrical load initially configured to receive power from the second power source through the third solid state switch and through the second relay switch.   
     
     
         25 . The arc suppression circuit of  claim 24 , wherein the microprocessor also controls the third and fourth solid state switches and the second relay switch. 
     
     
         26 . The arc suppression circuit of  claim 25 , wherein in response to an interruption of power from the second power source to the second power input:
 the microprocessor causes the third solid state switch to de-energize;   the microprocessor causes the second relay switch to switch from a first position to a second position; and   the microprocessor causes the fourth solid state switch to energize, thereby allowing the fourth solid state switch to provide the power received by the first power input to the second relay switch.