US2017236971A1PendingUtilityA1

Method for forming thin film chalcogenide layers

Assignee: IMEC VZWPriority: Sep 4, 2014Filed: Mar 9, 2017Published: Aug 17, 2017
Est. expirySep 4, 2034(~8.1 yrs left)· nominal 20-yr term from priority
H10P 14/3436H10P 14/3431H10P 14/3428H10P 14/3241H10P 14/2922H10P 14/203Y02E10/50H01L 31/1864H01L 31/032H01L 31/0725H01L 31/0326H10F 77/128H10F 77/12H10F 71/00H10F 10/161H10F 71/128
39
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

The disclosed technology generally relates to chalcogenide thin films, and more particularly to ternary and quaternary chalcogenide thin films having a wide band-gap, and further relates to photovoltaic cells containing such thin films, e.g., as an absorber layer. In one aspect, a method of forming a ternary or quaternary thin film chalcogenide layer containing Cu and Si comprises depositing a copper layer on a substrate. The method additionally comprises depositing a silicon layer on the copper layer with a [Cu]/[Si] atomic ratio of at least 0.7, and thereafter annealing in an inert atmosphere. The method further includes performing a first selenization or a first sulfurization, thereby forming a ternary thin film chalcogenide layer on the substrate. In another aspect, a composite structure includes a substrate having a service temperature not exceeding 600° C. and a ternary chalcogenide thin film or a quaternary chalcogenide thin film on the substrate, where the ternary or quaternary chalcogenide thin film comprises a selenide and/or a sulfide containing Cu and Si.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method of forming a chalcogenide thin film, the method comprising:
 depositing a copper layer on a substrate;   depositing a silicon layer on the copper layer, wherein an atomic ratio of the deposited copper to the deposited silicon is at least 0.7;   after depositing the copper layer and the silicon layer, annealing the deposited layers in an inert atmosphere, thereby forming a Cu—Si alloy layer; and   after annealing, performing a first sulfurization of the Cu—Si alloy layer, thereby forming the chalcogenide thin film comprising a sulfide.   
     
     
         2 . The method according to  claim 1 , wherein annealing is performed at a temperature between 400° C. and 600° C. 
     
     
         3 . The method according to  claim 1 , wherein annealing is performed at a temperature, for a duration and under an ambience such that at least one of Cu 3 Si, Cu 4 Si and Cu 5 Si is formed, and wherein annealing is performed before performing the first sulfurization. 
     
     
         4 . The method according to  claim 2 , wherein annealing is performed at a temperature between 400° C. and 450° C. 
     
     
         5 . The method according to  claim 1 , wherein the first sulfurization is performed at a temperature between 400° C. and 600° C. 
     
     
         6 . The method according to  claim 1 , wherein the first sulfurization is performed at a temperature, for a duration and under an ambience such that one or more of Cu 2 SiS 3 , Cu 2 S and CuS is formed. 
     
     
         7 . The method according to  claim 1 , further comprising:
 depositing a metal on the chalcogenide thin film;   after depositing the metal, further annealing in an inert atmosphere, thereby diffusing the metal into the chalcogenide thin film; and   after further annealing, performing a second sulfurization of the metal-containing chalcogenide thin film, thereby forming a quaternary chalcogenide thin film comprising a sulfide.   
     
     
         8 . The method according to  claim 7 , wherein depositing the metal comprises depositing a Zn layer. 
     
     
         9 . The method according to  claim 7 , wherein further annealing is performed at a temperature between 350° C. and 450° C. 
     
     
         10 . The method according to  claim 7 , wherein the second sulfurization is performed at a temperature between 400° C. and 600° C. 
     
     
         11 . The method according to  claim 7 , wherein the second sulfurization is performed at a temperature, for a duration and under an ambience such that Cu 2 ZnSiS 4  is formed. 
     
     
         12 . A method of forming a chalcogenide thin film, the method comprising;
 depositing copper and silicon on a substrate, wherein a ratio of deposited copper atoms to silicon atoms exceeds 0.7;   forming a Cu—Si alloy layer by subsequently annealing the deposited copper and silicon; and   exposing the Cu—Si alloy layer to an atmosphere containing sulfur, thereby forming a chalcogenide thin film comprising a sulfide.   
     
     
         13 . The method according to  claim 12 , wherein depositing copper and silicon comprises sequentially forming a copper layer and a silicon layer contacting each other. 
     
     
         14 . The method according to  claim 12 , wherein the Cu—Si alloy layer includes at least one of Cu 3 Si, Cu 4 Si and Cu 5 Si, and wherein annealing is performed before exposing the Cu—Si alloy layer to the atmosphere containing sulfur. 
     
     
         15 . The method according to  claim 12 , wherein the chalcogenide thin film includes one or more of Cu 2 SiS 3 , Cu 2 S and CuS. 
     
     
         16 . The method according to  claim 12 , further comprising:
 depositing a metal on the chalcogenide thin film;   after depositing the metal, further annealing, thereby diffusing the metal into the chalcogenide thin film; and   after further annealing, further exposing the metal-containing chalcogenide thin film to a second atmosphere containing sulfur, thereby forming a quaternary chalcogenide thin film comprising a sulfide   
     
     
         17 . A method of forming a chalcogenide thin film, the method comprising:
 depositing a copper layer on a substrate;   depositing a silicon layer directly on the copper layer;   forming a Cu—Si alloy layer by subsequently annealing the deposited copper and silicon layers; and   sulfurizing the Cu—Si alloy layer to form the chalcogenide thin film comprising a sulfide.   
     
     
         18 . The method according to  claim 16 , wherein the copper and silicon layers are such that a ratio of deposited copper atoms to silicon atoms exceeds 0.7. 
     
     
         19 . The method according to  claim 16 , wherein annealing is performed at a temperature between 400° C. and 600° C.

Join the waitlist — get patent alerts

Track US2017236971A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.