US2017228170A1PendingUtilityA1

Write Mechanism for Storage Class Memory

Assignee: INTEL CORPPriority: Dec 30, 2011Filed: Apr 5, 2017Published: Aug 10, 2017
Est. expiryDec 30, 2031(~5.4 yrs left)· nominal 20-yr term from priority
G06F 3/0611G06F 3/0656G06F 3/0679G06F 3/065G06F 12/0238G06F 2212/7205G06F 12/0246G06F 12/1433G06F 12/1009G06F 12/14
51
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

Storage class memory may be used in an architecture to achieve high performance, high reliability, high compatibility. In some embodiments, reads may be handled in a conventional way used in a memory based model. However writes do not use a memory based model but instead correspond to a storage based model. The hybrid nature can be achieved by setting the storage class memory to be write protected so that all writes must go through a software based block device interface. In some embodiments, the software based block device interface prevents erroneous writes to the storage class memory.

Claims

exact text as granted — not AI-modified
1 - 30 . (canceled) 
     
     
         31 . An apparatus comprising:
 a block device interface to receive write requests;   a buffer coupled to said interface to receive write requests from said interface;   a controller coupled to said buffer to find contiguous blocks within write requests; and   a non-volatile memory coupled to said controller, said controller to write continguous blocks in a batch write to said non-volatile memory.   
     
     
         32 . The apparatus of  claim 31  wherein said buffer is a circular buffer. 
     
     
         33 . The apparatus of  claim 31  wherein said controller is a syncer daemon. 
     
     
         34 . The apparatus of  claim 31 , said controller to reorganize blocks within write requests into contiguous blocks. 
     
     
         35 . The apparatus of  claim 31 , said controller to batch write contiguous blocks to non-volatile memory by resetting a page table entry for said contiguous blocks from read only to writeable. 
     
     
         36 . The apparatus of  claim 35 , said controller to change said page table entry back to read only after completing the batch write. 
     
     
         37 . The apparatus of  claim 31  wherein said non-volatile memory is a phase change memory. 
     
     
         38 . The apparatus of  claim 31  wherein said block device interface is set up by mapping a space in the non-volatile memory into an operating system, and initializing said space as read only. 
     
     
         39 . The apparatus of  claim 38  wherein said space can only be accessed by writes using a storage based model. 
     
     
         40 . A method comprising:
 receiving write requests in a block device interface;   receiving write requests from said interface in a buffer;   finding contiguous blocks within write requests; and   writing continguous blocks in a batch write to a non-volatile memory.   
     
     
         41 . The method of  claim 40  wherein said buffer is a circular buffer. 
     
     
         42 . The method of  claim 40  including using a syncer daemon. 
     
     
         43 . The method of  claim 40  including reorganizing blocks within write requests into contiguous blocks. 
     
     
         44 . The method of  claim 40  including batch writing contiguous blocks to non-volatile memory by resetting a page table entry for said contiguous blocks from read only to writeable. 
     
     
         45 . The method of  claim 44  including changing said page table entry back to read only after completing the batch write. 
     
     
         46 . The method of  claim 40  wherein said non-volatile memory is a phase change memory. 
     
     
         47 . The method of  claim 40  including setting up the block device interface by mapping a space in the non-volatile memory into an operating system, and initializing said space as read only. 
     
     
         48 . The method of  claim 47  only accessing said space by writes using a storage based model. 
     
     
         49 . One or more non-transitory computer readable media storing instructions to perform a sequence comprising:
 receiving write requests in a block device interface;   receiving write requests from said interface in a buffer;   finding contiguous blocks within write requests; and   writing contiguous blocks in a batch write to a non-volatile memory.   
     
     
         50 . The media of  claim 49  wherein said buffer is a circular buffer. 
     
     
         51 . The media of  claim 49  including using a syncer daemon. 
     
     
         52 . The media of  claim 49  including reorganizing blocks within write requests into contiguous blocks. 
     
     
         53 . The media of  claim 49  including batch writing contiguous blocks to non-volatile memory by resetting a page table entry for said contiguous blocks from read only to writeable. 
     
     
         54 . The media of  claim 53  including changing said page table entry back to read only after completing the batch write. 
     
     
         55 . The media of  claim 49  wherein said non-volatile memory is a phase change memory. 
     
     
         56 . The media of  claim 49  including setting up the block device interface by mapping a space in the non-volatile memory into an operating system, and initializing said space as read only. 
     
     
         57 . The media of  claim 56  only accessing said space by writes using a storage based model.

Join the waitlist — get patent alerts

Track US2017228170A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.