Trench having thick dielectric selectively on bottom portion

Abstract

A method of fabricating a semiconductor device includes etching a semiconductor substrate having a top surface to form a trench having sidewalls and a bottom surface that extends from the top surface into the semiconductor substrate. A dielectric liner of a first dielectric material is formed on the bottom surface and sidewalls of the trench to line the trench. A second dielectric layer of a second dielectric material is deposited to at least partially fill the trench. The second dielectric layer is partially etched to selectively remove the second dielectric layer from an upper portion of the trench while preserving the second dielectric layer on a lower portion of the trench. The trench is filled with a fill material which provides an electrical conductivity that is at least that of a semiconductor.

1 . A semiconductor device, comprising:
 a semiconductor substrate having at least one trench including sidewalls and a bottom surface that extends from a top surface of said semiconductor substrate into said semiconductor substrate;   a dielectric liner comprising a first dielectric material on said bottom surface and said sidewalls of said trench to line said trench;   a second dielectric layer comprising a second dielectric material on a lower portion of said trench but not on a top portion of said trench, and   a fill material filling said trench that provides an electrical conductivity that is at least that of a semiconductor.   
     
     
         2 . The semiconductor device of  claim 1 , wherein said trench is a trench isolation structure for said semiconductor device. 
     
     
         3 . The semiconductor device of  claim 1 , wherein said trench is a trench capacitor for said semiconductor device. 
     
     
         4 . The semiconductor device of  claim 1 , wherein said semiconductor substrate is a first doping type having a body region of a second doping type formed in said semiconductor substrate, and wherein said trench is associated with a metal-oxide-semiconductor field-effect transistor (MOSFET) transistor that utilizes said body region. 
     
     
         5 . The semiconductor device of  claim 4 , wherein said MOSFET transistor is a planar MOSFET transistor and said trench is a field plate associated with said planar MOSFET transistor. 
     
     
         6 . The semiconductor device of  claim 4 , wherein said MOSFET transistor is a trench gate MOSFET transistor and wherein said trench is a trench gate for said trench gate MOSFET transistor. 
     
     
         7 . The semiconductor device of  claim 1 , wherein said fill material comprises polysilicon. 
     
     
         8 . The semiconductor device of  claim 1 , wherein said semiconductor substrate comprises an epitaxial layer on a bulk substrate material, and wherein said trench extends into said bulk substrate material. 
     
     
         9 . The semiconductor device of  claim 1 , wherein said second dielectric material has a k-value≧5. 
     
     
         10 . A semiconductor device, comprising:
 a semiconductor substrate having at least one trench including sidewalls and a bottom surface;   a dielectric liner comprising a first dielectric material on said bottom surface and said sidewalls of said trench to line said trench;   a silicon nitride layer on the dielectric liner in a lower portion of the trench but not on a top portion of the trench, and   a conductive material filling said trench, wherein the conductive material is directly on the silicon nitride layer at the bottom of the trench and wherein the dielectric liner separates the conductive material from the sidewalls of the trench including the top portion of the trench.   
     
     
         11 . The semiconductor device of  claim 10 , wherein said semiconductor substrate comprises an epitaxial layer on a bulk substrate material, and wherein said trench extends into said bulk substrate material. 
     
     
         12 . The semiconductor device of  claim 10 , wherein said conductive material comprises polysilicon.