US2017206031A1PendingUtilityA1

Fine grain level memory power consumption control mechanism

Assignee: SAMSUNG ELECTRONICS CO LTDPriority: Jan 15, 2016Filed: Apr 29, 2016Published: Jul 20, 2017
Est. expiryJan 15, 2036(~9.4 yrs left)· nominal 20-yr term from priority
Inventors:Liang Yin
G06F 3/0659G06F 3/0673G06F 1/3287G06F 3/0625Y02D10/00G06F 2212/1028G06F 1/3225G06F 1/3275G06F 12/00Y02D30/50G11C 5/04G11C 5/148
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Claims

Abstract

According to one general aspect, an apparatus may include a memory module. The memory module may include a plurality of memory banks configured to store data. The memory module may include a plurality of memory bank power down controllers, each configured to place one or more respective memory bank(s) in a power down mode. The memory module may include a memory module command interface configured to receive a handshake command from a memory controller, wherein the handshake command comprises a command to remove an indicated memory bank from power down mode.

Claims

exact text as granted — not AI-modified
1 . An apparatus comprising:
 a memory module comprising:   a plurality of memory banks configured to store data;   a plurality of memory bank power down controllers, each configured to place one or more respective memory bank(s) in a power down mode; and   a memory module command interface configured to receive a handshake command from a memory controller, wherein the handshake command comprises a command to remove an indicated memory bank from power down mode.   
     
     
         2 . The apparatus of  claim 1 , wherein the memory module further comprises:
 a plurality of memory bank power down triggers each comprising:
 a sleep counter configured to store a value associated with a power mode of a respective memory bank; and 
 a sleep threshold that indicates a value of the sleep counter after which the respective memory bank will be placed in the power down mode. 
   
     
     
         3 . The apparatus of  claim 2 , wherein at least one sleep threshold is re-programmable. 
     
     
         4 . The apparatus of  claim 2 , wherein each sleep counter is configured to count a number of memory bank accesses that have occurred since a last time a respective memory bank was accessed. 
     
     
         5 . The apparatus of  claim 1 , wherein each of the memory bank power down controllers are configured to:
 receive a memory bank command for a respective memory bank; and   if the memory bank command includes the handshake command, remove the respective memory bank from power down mode.   
     
     
         6 . The apparatus of  claim 1 , wherein the handshake command includes a precharge command. 
     
     
         7 . The apparatus of  claim 1 , wherein each memory bank is configured to enter a power down mode independently of any other memory bank. 
     
     
         8 . An apparatus comprising:
 a memory controller circuit configured to manage a flow of data going to and from a memory module;   a plurality of power down trigger predictors, each associated with a memory bank of the memory module, and wherein, each power down trigger predictor is configured to predict if a respective memory bank is in a power down mode; and   a command interface configured to transmit a handshake command to the memory module, wherein the handshake command is configured to remove an indicated memory bank from power down mode.   
     
     
         9 . The apparatus of  claim 8 , further comprising
 a table configured to indicate which, if any memory banks of the memory module are in a power down mode; and   wherein the memory controller is configured to, when an access request for a target memory bank is received, check the table to determine a state of the target memory bank and, based upon the state perform an action.   
     
     
         10 . The apparatus of  claim 9 , wherein the memory controller is configured to, if the table indicates the target memory bank is in the power down mode:
 transmit a bank miss response to a requesting device; and   transmit the handshake command to the memory module that includes the target memory bank.   
     
     
         11 . The apparatus of  claim 8 , wherein each power down trigger predictors comprises:
 a sleep counter configured to store a value associated with a power mode of a respective memory bank; and   a sleep threshold that indicates a value of the sleep counter after which the respective memory bank will be placed in the power down mode.   
     
     
         12 . The apparatus of  claim 11 , wherein each sleep threshold is re-programmable. 
     
     
         13 . The apparatus of  claim 11 , wherein each sleep counter is configured to count a number of memory bank accesses that have occurred since a last time a respective memory bank was targeted. 
     
     
         14 . The apparatus of  claim 8 , wherein the handshake command includes a precharge command. 
     
     
         15 . A system comprising:
 a memory controller comprising:
 a command interface configured to transmit a handshake command to a memory module, wherein the handshake command is configured to remove an indicated memory bank from power down mode. 
   the memory module comprising:
 a plurality of memory banks configured to store data; 
 a plurality of memory bank power down controllers, each configured to place a respective memory bank in a power down mode; and 
 a memory module command interface configured to receive the handshake command. 
   
     
     
         16 . The system of  claim 15 , wherein the memory module comprises:
 a plurality of memory bank power down triggers, each comprising:
 a sleep counter configured to store a value associated with a power mode of a respective memory bank; and 
 a sleep threshold that indicates a value of the sleep counter after which the respective memory bank will be placed in the power down mode. 
   
     
     
         17 . The system of  claim 16 , wherein each sleep counter is configured to count a number of clock cycles that have occurred since a last time a respective memory bank was targeted. 
     
     
         18 . The system of  claim 15 , wherein the memory controller comprises:
 a plurality of power down trigger predictors, each associated with one or more memory bank(s) of the memory module, and wherein, each power down trigger predictor is configured to predict is a respective memory bank is in a power down mode;   a table configured to indicate which, if any memory banks of the memory module are in a power down mode; and   wherein the memory controller is configured to, when an access request for a target memory bank is received, check the table to determine a state of the target memory bank and, based upon the state perform an action.   
     
     
         19 . The system of  claim 17 , wherein the memory controller is configured to, if the table indicates the target memory bank is in the power down mode:
 transmit a bank miss response to a requesting device; and   transmit the handshake command to the memory module.   
     
     
         20 . The system of  claim 15 , wherein the memory modules comprising a first plurality of power down triggers, each associated with a memory bank of the memory module, and wherein, each power down trigger is configured to dictate when a respective memory bank is in a power down mode; and
 wherein the memory module includes a second plurality of power down triggers, wherein each of the second power down triggers is associated with a respective first power down trigger and configured to predict an action of the respective first power down trigger.   
     
     
         21 - 25 . (canceled) 
     
     
         26 . A method comprising:
 determining if a memory access is to a target memory bank of a memory module, wherein the memory module comprises a plurality of memory banks;   if not, incrementing a counter associated with the target memory bank;   determining if the counter has exceeded a threshold value; and   if the counter has exceeded the threshold value, placing only the target memory bank in a power down mode, wherein at least one other memory bank of the memory module is not in the power down mode.   
     
     
         27 . The method of  claim 26 , further comprising, if the target memory bank is in a power down mode and the memory access is to the target memory bank:
 determining if the memory access includes a handshake command from a memory controller; and   if so, removing the target memory bank from power down mode.   
     
     
         28 . The method of  claim 26 , further comprising, if the target memory bank is in a power down mode and the memory access is to the target memory bank:
 responding to the memory access with a page miss; and   transmitting a handshake command to the memory module, wherein the handshake command comprises a command to remove an indicated memory bank from power down mode.   
     
     
         29 . The method of  claim 28 , further comprising, if the target memory bank is in a power down mode and the memory access is to the target emery bank, marking the target memory bank as not being in the power down mode. 
     
     
         30 . The method of  claim 26 , wherein each of the plurality of memory banks is configured to enter a power down mode independently of any other memory bank.

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