US2017200257A1PendingUtilityA1
Degradation control of display pixels for a high definition display
Est. expiryOct 29, 2034(~8.3 yrs left)· nominal 20-yr term from priority
G09G 3/20H04N 23/635G09G 2320/046G06T 3/20G06T 11/60G09G 2320/0233G06T 3/40G09G 5/10H04N 5/23293
50
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Claims
Abstract
An apparatus includes a display and an image processing system. The display has an array of horizontal pixels and vertical pixels. The image processing system is configured to present an image on the display as a visible display array having a smaller size than the array and to shift the visible display array by at least one pixel.
Claims
exact text as granted — not AI-modified1 . A system for preventing pixel degradation of an overlay superimposed on an image display, the system comprising:
a video processor configured to generate an overlay superimposed on an image display that degradates when the overlay remains in a first position and in a first color for a first period of time, the image display including an array of pixels that is configured to be energized so as to generate the overlay superimposed on the image display; and a shift processor configured to shift the overlay superimposed on the image display to a second position away from the first position by at least one pixel after a second period of time less than the first period of time so as to prevent the overlay superimposed on the image display from remaining in the first positon and in the first color for the first period of time and prevent the overlay superimposed on the image display from degradating at least a portion of the array of pixels as a result of the overlay remaining in the first position and in the first color for the first period of time; and wherein the overlay comprises a center cross-mark indicator that forms a guide for a user with reference to a view of the image display.
2 . The system of claim 1 , wherein the shift processor is configured to set a maximum horizontal shift of a first set of pixels and a maximum vertical shift of a second set of pixels in the image display.
3 . The system of claim 1 , wherein the shift processor is further configured to set a shift frequency and perform subsequent shifts of both the image and the overlay at intervals according to the shift frequency to prevent the image and the overlay from degradating the array of pixels as a result of remaining in the first position and in the first color for the first period of time.
4 . The system of claim 1 , wherein the shift processor is further configured to set a shift frequency and perform subsequent shifts of the overlay at intervals according to the shift frequency to prevent the overlay from degradating at least a portion of the array of pixels as a result of the overlay remaining in the first position and in the first color for the first period of time.
5 . The system of claim 1 , further comprising a scaling unit configured to scale an input video image size to fit an image that includes the overlay, wherein the image has a smaller size than the image display comprising the array of pixels.
6 . The system of claim 5 , further comprising a clock crossing unit to buffer a video input signal of a first clock domain for a scaling performed by the scaling unit in a second clock domain to prevent the overlay from degradating the image display as a result of the overlay remaining in the first position and in the first color for the first period of time.
7 . The system of claim 1 , further comprising a memory configured to store a current position of the shifted overlay, wherein upon deenergizing the image display and restoring power to the image display, the current position of the shifted overlay is recalled from the memory, and the overlay is presented based on the stored current position of the shifted overlay.
8 . A system for controlling degradation of display pixels, the system comprising:
a video-in processor configured to generate a visible display array including an image and an overlay to be displayed on a display comprising an array of pixels that degradate when energized for a first period of time; and a shift processor configured to shift both the image and the overlay by at least one pixel on the display after a second period of time less than the first period of time so as to prevent the array of pixels from degradating when energized for the first period of time.
9 . The system of claim 8 , wherein the shift processor is configured to set a maximum horizontal shift of a first set of pixels and a maximum vertical shift of a second set of pixels in the image display.
10 . The system of claim 8 , wherein the shift processor is further configured to set a shift frequency and perform subsequent shifts of both the image and the overlay at intervals according to the shift frequency to prevent the array of pixels from degradating when energized.
11 . The system of claim 8 , further comprising a scaling unit configured to scale an input video image size to fit the visible display array, wherein the visible display array has a smaller size than the display comprising the array of pixels.
12 . The system of claim 11 , further comprising a clock crossing unit to buffer a video input signal of a first clock domain for a scaling performed by the scaling unit in a second clock domain to prevent the array of pixels from degradating when energized.
13 . The system of claim 8 , further comprising a memory configured to store a current position of the shifted visible display array, wherein upon deenergizing the array of pixels and restoring power to the array of pixels, the current position of the shifted visible display array is recalled from the memory, and the visible display array is presented based on the stored current position of the shifted visible display array.
14 . The system of claim 8 , wherein the overlay comprises a center cross-mark indicator that forms a guide for a user with reference to a center of view of the display.
15 . A system for preventing pixel degradation from an overlay superimposed on an image display, the system comprising:
a video processor configured to generate an overlay superimposed on an image display that degradates when the overlay remains in a first position for a first period of time, the image display including an array of pixels that is configured to be energized so as to generate the overlay superimposed on the image display; and a shift processor configured to shift the overlay superimposed on the image display to a second position away from the first position by at least one pixel after a second period of time less than the first period of time so as to prevent the overlay from remaining in the first positon for the first period of time and prevent the overlay from degradating at least a portion of the array of pixels.
16 . The system of claim 15 , wherein the shift processor is further configured to set a maximum horizontal shift of a first set of pixels and a maximum vertical shift of a second set of pixels in the image display.
17 . The system of claim 15 , wherein the shift processor is further configured to set a shift frequency and perform subsequent shifts of both an image displayed on the image display and the overlay at intervals according to the shift frequency to prevent the array of pixels from degradating when energized.
18 . The system of claim 15 , wherein the shift processor is further configured to set a shift frequency and perform subsequent shifts of the overlay at intervals according to the shift frequency to prevent the overlay from degradating the image display when energized.
19 . The system of claim 15 , wherein the shift processor is further configured to set a shift frequency and perform subsequent shifts of the overlay at intervals according to the shift frequency to prevent the overlay from remaining in the first positon for the first period of time and prevent the image display from degradating.
20 . The system of claim 15 , further comprising a scaling unit configured to scale an input video image size to fit a visible display array, wherein the visible display array has a smaller size than the image display comprising the array of pixels.
21 . The system of claim 20 , further comprising a clock crossing unit to buffer a video input signal of a first clock domain for a scaling performed by the scaling unit in a second clock domain to prevent the array of pixels from degradating when energized.
22 . The system of claim 21 , wherein the scaling unit comprises at least one upscaling unit and at least one downscaling unit configured to perform at least two of an upscaling of horizontal pixels, an upscaling of vertical pixels, a downscaling of horizontal pixels or a downscaling of vertical pixels to prevent the overlay from degradating at least a portion of the array of pixels.
23 . The system of claim 22 , further comprising a clock crossing unit to buffer a video input signal of a first clock domain for a scaling performed by the scaling unit in a second clock domain to prevent the image display from degradating.
24 . The system of claim 15 , further comprising a memory configured to store a current position of the shifted overlay, wherein upon deenergizing the array of pixels and restoring power to the array of pixels, the current position of the shifted overlay is recalled from the memory, and the overlay is presented based on the stored current position of the shifted overlay.
25 . The system of claim 15 , wherein the overlay comprises a center cross-mark indicator that forms a guide for a user with reference to a center of view of the display.
26 . A system for controlling degradation of display pixels, the system comprising:
a video-in processor configured to generate a visible display array including an image and an overlay to be displayed on a display comprising an array of pixels; and a shift processor configured to shift both the image and the overlay by at least one pixel on the display to control degradation of the array of pixels.
27 . The system of claim 26 , further comprising the display configured to display the visible display array that includes the image and the overlay.
28 . The system of claim 26 , wherein the shift processor is further configured to set a maximum horizontal shift of n pixels and a maximum vertical shift of m pixels in the display, wherein the shift of at least one pixel comprises at least one of a horizontal shift of N pixels in the range 1<=N<=n, or a vertical shift of M pixels in the range 1<=M<=m.
29 . The system of claim 26 , wherein the shift processor is further configured to set a shift frequency and perform subsequent shifts of both the image and the overlay at intervals according to the shift frequency to prevent the array of pixels from degradating.
30 . The system of claim 26 , further comprising a scaling unit configured to scale an input video image size to fit the visible display array, wherein the visible display array has a smaller size than the display comprising the array of pixels.
31 . The system of claim 30 , further comprising a clock crossing unit to buffer a video input signal of a first clock domain for a scaling performed by the scaling unit in a second clock domain.
32 . The system of claim 26 , further comprising a memory configured to store a current position of the shifted visible display array, wherein upon deenergizing the display and restoring power to the display, the position is recalled from the memory, and the visible display array is presented based on the stored position.
33 . The system of claim 26 , wherein the overlay comprises a center cross-mark that forms a guide for a user with reference to a center of view of the display.
34 . A method for controlling degradation of display pixels, the method comprising:
generating a visible display array including an image and an overlay to be displayed on a display comprising an array of pixels; and shifting both the image and the overlay by at least one pixel on the display to control degradation of the array of pixels.
35 . The method of claim 34 , further comprising displaying, on the display, the visible display array that includes the image and the overlay.
36 . The method of claim 34 , further comprising setting a maximum horizontal shift of n pixels and a maximum vertical shift of m pixels in the display, wherein the shifting of at least one pixel comprises at least one of a horizontal shift of N pixels in the range 1<=N<=n, or a vertical shift of M pixels in the range 1<=M<=m.
37 . The method of claim 34 , further comprising setting a shift frequency, and performing subsequent shifts of both the image and the overlay at intervals according to the shift frequency to prevent the array of pixels from degradating.
38 . The method of claim 34 , further comprising scaling an input video image size to fit the visible display array, wherein the scaling comprises at least one of an upscaling of horizontal pixels, an upscaling of vertical pixels, a downscaling of horizontal pixels or a downscaling of vertical pixels.
39 . The method of claim 38 , further comprising buffering a video input signal of a first clock domain for the scaling performed in a second clock domain.
40 . The method of claim 34 , further comprising:
storing, in a memory, a current position of the shifted visible display array; recalling the position from the memory upon deenergizing the display and restoring power to the display; and causing the visible display array to be displayed on the display based on the stored position.Join the waitlist — get patent alerts
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