Self-biased oscillator
Abstract
Described herein is a phase-locked loop including a phase detector, a charge pump, a filter, and a self-biased voltage-controlled oscillator having an oscillating frequency controlled by a control signal. The self-biased voltage-controlled oscillator includes a first differentiator and a second differentiator. The second differentiator has an input node coupled to the output node of the first differentiator, and an output node coupled to the input node of the first differentiator. In one embodiment, each of the first and the second differentiators has adjustable resistance and/or capacitance, and the oscillating frequency of the voltage-controlled oscillator is independent of power supply provided to the first and the second differentiators.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A phase-locked loop comprising a phase detector, a charge pump, a filter, and a self-biased voltage-controlled oscillator having an oscillating frequency controlled by a control signal, the control signal being coupled to the output of the charge pump, the self-biased voltage-controlled oscillator comprising:
a first differentiator having a first output node and a first input node; and a second differentiator having a second input node coupled to the first output node, and having a second output node coupled to the first input node; each of the first and the second differentiators configured with one or both of adjustable resistance and adjustable capacitance, wherein the oscillating frequency of the voltage-controlled oscillator is independent of power supply provided to the first and the second differentiators.
2 . The phase-locked loop of claim 1 , wherein the oscillating frequency of the voltage-controlled oscillator is a function of the adjustable resistance and the adjustable capacitance.
3 . The phase-locked loop of claim 2 , wherein the adjustable resistance and the adjustable capacitance of the first and the second differentiators are controlled by the control signal.
4 . The phase-locked loop of claim 1 , wherein the first and second differentiators each comprises:
an amplifier with an input node and an output node; and a resistive device with a node coupled to the input node of the amplifier, wherein the output node of the amplifier of the first differentiator is coupled to the first output node, and the output node of the amplifier of the second differentiator is coupled to the second output node.
5 . The phase-locked loop of claim 4 , wherein the first and second differentiators comprise:
a switchable device coupled in series or parallel to the resistive device, wherein the switchable device having a node coupled to the output node of the amplifier and a resistance controllable by the control signal.
6 . The phase-locked loop of claim 4 , wherein the resistive device has a resistance controllable by the control signal.
7 . The phase-locked loop of claim 1 , wherein the first differentiator comprises:
a capacitive device with a first node coupled to the first input node, and a second node coupled to an input of an amplifier.
8 . The phase-locked loop of claim 7 , wherein the capacitive device is a varactor with a capacitance controllable by the control signal.
9 . The phase-locked loop of claim 1 , wherein the second differentiator comprises:
a capacitive device with a first node coupled to the second input node, and a second node coupled to an input of an amplifier.
10 . The phase-locked loop of claim 9 , wherein the capacitive device is a varactor with a capacitance controllable by the control signal.
11 . A digital phase-locked loop comprising a phase detector, a controller, a digital filter, and a self-biased digitally-controlled oscillator having an oscillating frequency controlled by a control signal filtered by the digital filter and coupled to the controller, the self-biased digitally-controlled oscillator comprising:
a first differentiator having a first output node and a first input node; and a second differentiator having a second input node coupled to the first output node, and having a second output node coupled to the first input node; each of the first and the second differentiators configured with one or both of adjustable resistance and adjustable capacitance, wherein the oscillating frequency of the digitally-controlled oscillator is independent of power supply provided to the first and the second differentiators.
12 . The phase-locked loop of claim 11 , wherein the oscillating frequency of the digitally-controlled oscillator is a function of the adjustable resistance and the adjustable capacitance.
13 . The phase-locked loop of claim 12 , wherein the adjustable resistance and the adjustable capacitance of the first and the second differentiators are controlled by the control signal.
14 . The phase-locked loop of claim 11 , wherein the first and second differentiators each comprises:
an amplifier with an input node and an output node; and a resistive device with a node coupled to the input node of the amplifier, wherein the output node of the amplifier of the first differentiator is coupled to the first output node, and the output node of the amplifier of the second differentiator is coupled to the second output node.
15 . The phase-locked loop of claim 14 , wherein the first and second differentiators comprise:
a switchable device coupled in series or parallel to the resistive device, wherein the switchable device having a node coupled to the output node of the amplifier and a resistance controllable by the control signal.
16 . The phase-locked loop of claim 11 , wherein the first differentiator comprises:
a capacitive device with a first node coupled to the first input node, and a second node coupled to an input of an amplifier.
17 . The phase-locked loop of claim 16 , wherein the capacitive device is a varactor with a capacitance controllable by the control signal.
18 . The phase-locked loop of claim 11 , wherein the second differentiator comprises:
a capacitive device with a first node coupled to the second input node, and a second node coupled to an input of an amplifier.
19 . The phase-locked loop of claim 18 , wherein the capacitive device is a varactor with a capacitance controllable by the control signal.
20 . A self-biased voltage controlled oscillator, comprising:
a first differentiator having a first output node and a first input node; and a second differentiator having a second input node coupled to the first output node, and having a second output node coupled to the first input node; each of the first and the second differentiators configured with one or both of adjustable resistance and adjustable capacitance, wherein the oscillating frequency of the voltage-controlled oscillator is independent of power supply provided to the first and the second differentiators, and wherein the oscillating frequency of the voltage-controlled oscillator is a function of the adjustable resistance and the adjustable capacitance both controllable by a control signal received by the first and the second differentiators.Join the waitlist — get patent alerts
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