Selective coupling of voltage feeds for body bias voltage in an integrated circuit device

Abstract

An integrated circuit device having a body bias voltage mechanism. The integrated circuit comprises a resistive structure disposed therein for selectively coupling either a body bias voltage or a power supply voltage to biasing wells. A first pad for coupling with a first externally disposed pin can optionally be provided. The first pad is for receiving an externally applied body bias voltage. Circuitry for producing a body bias voltage can be coupled to the first pad for coupling a body bias voltage to a plurality of biasing wells disposed on the integrated circuit device. If a body bias voltage is not provided, the resistive structure automatically couples a power supply voltage to the biasing wells. The power supply voltage may be obtained internally to the integrated circuit.

What is claimed is: 
     
         1 . An integrated circuit device comprising a resistive structure disposed thereon for selectively coupling a body well to a body bias voltage supply or to a power supply voltage, wherein the body bias voltage supply is configured to provide a voltage different from the power supply voltage. 
     
     
         2 . The integrated circuit device of  claim 1  wherein the body bias voltage supply is external to the integrated circuit device. 
     
     
         3 . The integrated circuit device of  claim 1  wherein the power supply voltage is internally obtained. 
     
     
         4 . The integrated circuit device of  claim 1  wherein the resistive structure comprises surface n well and deep n well regions. 
     
     
         5 . The integrated circuit device of  claim 1  wherein the resistive structure comprises surface p well and deep n well regions. 
     
     
         6 . The integrated circuit device of  claim 1  wherein the resistive structure comprises a resistance of about 1 kilo ohm. 
     
     
         7 . The integrated circuit device of  claim 1  wherein the coupling comprises a body bias distribution network comprising deep wells. 
     
     
         8 . An integrated circuit device comprising:
 a metal voltage rail coupled to a power supply voltage;   a first region of diffusion disposed beneath and coupled to the metal voltage rail; and   a second region of diffusion coupled to a plurality of diffusion lines, wherein the plurality of diffusion lines couple a voltage of the second region of diffusion to regions of semiconductor devices;   wherein the first region of diffusion is coupled to the second region of diffusion,   wherein the first region of diffusion forms a resistor having a predetermined resistance between the metal voltage rail and the second region of diffusion,   wherein the resistor is configured to:
 couple a body terminal of a transistor of the integrated circuit device to a power supply voltage under a first condition; and 
 isolate the power supply voltage from the body terminal under a second condition, wherein under the second condition, the body terminal is coupled to a body bias voltage supply, 
 wherein the body bias voltage is configured to be a voltage different from a power supply voltage, 
 wherein the body terminal is not coupled to a source terminal of the transistor. 
   
     
     
         9 . The integrated circuit device of  claim 8 , wherein the body bias voltage supply is external to the integrated circuit device. 
     
     
         10 . The integrated circuit device of  claim 8 , wherein the power supply voltage is configured to be obtained internally from the integrated circuit device, and wherein the first condition is characterized as the body bias voltage supply does not supply a desired voltage. 
     
     
         11 . The integrated circuit device of  claim 8 , wherein the resistor comprises surface n well and deep n well regions. 
     
     
         12 . The integrated circuit device of  claim 8 , wherein the resistor comprises surface p well and deep n well regions. 
     
     
         13 . The integrated circuit device of  claim 8 , wherein the body terminal comprises a body bias distribution network including deep wells. 
     
     
         14 . A semiconductor structure comprising:
 a substrate having a primary surface;   a metal oxide semiconductor formed in the substrate comprising a body formed in a p-well,   wherein the p-well is coupled to a body bias voltage supply configured to provide a non-ground potential,   wherein the body is not coupled to another terminal of the metal oxide semiconductor;   a metallization pattern above the primary surface device coupled to ground;   a plurality of contacts for coupling the metallization pattern to a p-type diffusion, wherein the p-type diffusion extends from the primary surface to a first depth below the primary surface;   a deep n-well below the p-type diffusion;   a surface n-well physically extending into the deep n-well,   wherein the surface n-well and the deep n-well form a partial isolation tub to electrically isolate the p-type diffusion;   a gap in the surface n-well configured to enable a portion of the p-type diffusion to couple to the p-well.   
     
     
         15 . The semiconductor structure of  claim 14  wherein the p-type diffusion forms a predetermined resistance between the ground and the p-well. 
     
     
         16 . The semiconductor structure of  claim 15  wherein the predetermined resistance is about 1 kilo ohm. 
     
     
         17 . The semiconductor structure of  claim 14  for producing a p-well body bias voltage that is different from the ground voltage. 
     
     
         18 . The semiconductor structure of  claim 14  wherein the resistance of the p-well is substantially less that the resistance of the p-type diffusion. 
     
     
         19 . The semiconductor structure of  claim 14  wherein the length of the first region of n well diffusion is substantially different from the width of the first region of n well diffusion. 
     
     
         20 . The semiconductor structure of  claim 14  wherein the second region of p-diffusion is substantially square.