US2017179112A1PendingUtilityA1

Semiconductor device

Assignee: RENESAS ELECTRONICS CORPPriority: Aug 28, 2014Filed: Mar 1, 2017Published: Jun 22, 2017
Est. expiryAug 28, 2034(~8.1 yrs left)· nominal 20-yr term from priority
Inventors:Koki Narita
H10W 20/432H01L 27/0629H01L 27/0255H01L 29/41758H01L 27/0266H01L 23/5221H10D 30/62H10D 30/60H10D 89/815H10D 89/611H10D 84/811H10D 64/257H10D 89/811
45
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Claims

Abstract

A semiconductor device includes a plurality of gate electrodes, and a plurality of stripe contacts, each formed alternately with each of the gate electrodes along a length direction of the gate electrodes. A conductive transistor with a reference potential applied to one of the stripe contacts forming one of a source and a drain is formed. One of the gate electrodes adjacent to one of the stripe contacts forming the other of the source and the drain is used as a first dummy gate electrode. The semiconductor device further includes a metal extending over the first dummy gate electrode to electrically connect together the stripe contacts formed on opposing sides of the first dummy gate electrode, and a pad connected to one of the stripe contacts formed on opposing sides of the first dummy gate electrode, which is provided across the first dummy gate electrode from the conductive transistor.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device comprising:
 a semiconductor substrate including a main surface over which a first gate electrode and a second gate electrode are formed, a first diffusion region and a second diffusion region;   a resistive component formed on the main surface and extending in a first direction of the main surface;   a first metal formed over the first gate electrode and extending in a second direction perpendicular to the first direction in plan view such that the first metal is overlapped with the first gate electrode; and   a pad formed over the resistive component;   wherein the first gate electrode is used as a first dummy gate electrode and located between the resistive component and the first diffusion region in plan view,   wherein the second gate electrode is located between the first diffusion region and the second diffusion region in plan view such that the second gate electrode, the first diffusion region and the second diffusion region are used as a conductive transistor,   wherein the first diffusion region is located between the first gate electrode and the second gate electrode in plan view,   wherein the first metal is electrically connected to the resistive component and the first diffusion region, and   wherein the pad is electrically connected to the first metal through the resistive component.   
     
     
         2 . The semiconductor device according to  claim 1 ,
 wherein the pad is electrically connected to the resistive component through a first via.   
     
     
         3 . The semiconductor device according to  claim 1 , further comprising an integrated circuit unit connected in parallel with the conductive transistor for the pad,
 wherein the conductive transistor allows a flow of an electrostatic discharge current which has been input to the pad.   
     
     
         4 . The semiconductor device according to  claim 1 ,
 wherein the pad is a signal pad for at least one of an input signal and an output signal to and from an integrated circuit unit.   
     
     
         5 . The semiconductor device according to  claim 2 ,
 wherein the resistive component includes a first stripe contact formed of metal, and   wherein a length of the first stripe contact in the first direction is longer than a length of the first stripe contact in the second direction in plan view.   
     
     
         6 . The semiconductor device according to  claim 5 ,
 wherein a second stripe contact is formed of metal and arranged on the first diffusion region,   wherein the first metal is electrically connected to the first diffusion region through the second stripe contact, and   wherein a length of the second stripe contact in the first direction is longer than a length of the first stripe contact in the second direction in plan view.   
     
     
         7 . The semiconductor device according to  claim 6 ,
 wherein a length of the first gate electrode in the first direction is longer than a length of the first gate electrode in the second direction in plan view.   
     
     
         8 . The semiconductor device according to  claim 7 ,
 wherein the first diffusion region is for source, and the second diffusion region is for drain, and   wherein a reference potential is applied to the second diffusion region.   
     
     
         9 . The semiconductor device according to  claim 7 , further comprising an integrated circuit unit connected in parallel with the conductive transistor for the pad,
 wherein the conductive transistor allows a flow of an electrostatic discharge current which has been input to the pad.   
     
     
         10 . The semiconductor device according to  claim 7 ,
 wherein the pad is a signal pad for one of an input signal and an output signal to and from an integrated circuit unit.   
     
     
         11 . The semiconductor device according to  claim 7 ,
 wherein a second metal is located between the pad and the first via and is electrically connected to the pad and the resistive component.   
     
     
         12 . The semiconductor device according to  claim 7 ,
 wherein the first metal is electrically connected to the second stripe contact through a second via.   
     
     
         13 . The semiconductor device according to  claim 7 ,
 wherein the resistive component is electrically connected to the first metal through a third via.   
     
     
         14 . The semiconductor device according to  claim 11 ,
 wherein the first metal and the second metal are arranged in same layer.

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