Method for fabricating semiconductor device

Abstract

A method for fabricating semiconductor device includes the steps of: providing a substrate having a fin-shaped structure thereon and a shallow trench isolation (STI) around the fin-shaped structure, in which the fin-shaped structure has a top portion and a bottom portion; forming a first doped layer on the STI and the top portion; and performing a first anneal process.

What is claimed is: 
     
         1 . A method for fabricating semiconductor device, comprising:
 providing a substrate having a fin-shaped structure thereon and a shallow trench isolation (STI) around the fin-shaped structure, wherein the fin-shaped structure comprises a top portion and a bottom portion;   forming a first doped layer on the STI and the top portion; and   performing a first anneal process.   
     
     
         2 . The method of  claim 1 , wherein the top surface of the STI is even with the bottom surface of the top portion of the fin-shaped structure. 
     
     
         3 . The method of  claim 1 , wherein the first doped layer comprises borosilicate glass (BSG) or phosphosilicate glass (PSG). 
     
     
         4 . The method of  claim 1 , further comprising:
 removing the first doped layer;   forming a gate structure on the substrate and the fin-shaped structure;   removing part of the fin-shaped structure adjacent to the gate structure for forming a recess;   forming a second doped layer on the gate structure and in the recess;   performing a second anneal process; and   removing the second doped layer.   
     
     
         5 . The method of  claim 4 , wherein the second doped layer comprises borosilicate glass (BSG) or phosphosilicate glass (PSG). 
     
     
         6 . A method for fabricating semiconductor device, comprising:
 providing a substrate having a first region and a second region;   forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region;   forming a shallow trench isolation (STI) around the first fin-shaped structure and the second fin-shaped structure so that each of the first fin-shaped structure and the second fin-shaped structure is divided into a top portion and a bottom portion;   forming a first doped layer on the STI and the top portion of the second fin-shaped structure;   forming a second doped layer on the STI and the top portion of the first fin-shaped structure; and   performing a first anneal process.   
     
     
         7 . The method of  claim 6 , further comprising:
 forming the first doped layer and a first liner on the STI, the first fin-shaped structure and the second fin-shaped structure;   removing the first liner and the first doped layer from the first region;   forming the second doped layer and a second liner on the STI, the first fin-shaped structure and the first liner; and   performing the first anneal process.   
     
     
         8 . The method of  claim 7 , further comprising:
 removing the second liner and the second doped layer from the second region before performing the first anneal process.   
     
     
         9 . The method of  claim 6 , wherein the top surface of the STI is even with the bottom surface of the top portion of the first fin-shaped structure and the bottom surface of the top portion of the second fin-shaped structure. 
     
     
         10 . The method of  claim 6 , wherein the first doped layer comprises borosilicate glass (BSG) and the second doped layer comprises phosphosilicate glass (PSG). 
     
     
         11 . The method of  claim 6 , further comprising:
 removing the first doped layer and the second doped layer;   forming a first gate structure on the first fin-shaped structure and a second gate structure on the second fin-shaped structure;   removing part of the first fin-shaped structure adjacent to the first gate structure for forming a first recess and part of the second fin-shaped structure adjacent to the second gate structure for forming a second recess;   forming a third doped layer on the second gate structure and in the second recess;   forming a fourth doped layer on the first gate structure and in the first recess; and   performing a second anneal process.   
     
     
         12 . The method of  claim 11 , further comprising:
 forming the third doped layer and a third liner on the first gate structure and the second structure and in the first recess and the second recess;   removing the third liner and the third doped layer from the first region;   forming the fourth doped layer and a fourth liner on the first gate structure and the third liner; and   performing the second anneal process.   
     
     
         13 . The method of  claim 12 , further comprising:
 removing the fourth liner and the fourth doped layer from the second region before performing the second anneal process.   
     
     
         14 . The method of  claim 11 , wherein the third doped layer comprises borosilicate glass (BSG) and the fourth doped layer comprises phosphosilicate glass (PSG).